28F640L30, 28F128L30, 28F256L30
Figure 29. Write State Machine — Next State Table (Sheet 4 of 6)
Chip
Command Input to Chip and resulting
Next State
Lock
Block
Confirm (9)
Lock-Dow n
Block
Illegal Cmds
OTP Setup
Write CR
Confirm
Block Confirm
Address or BEFP Data
(WA0)
WSM
Operation
Completes
(5)
(9)
(9)
(2)
(all other
(XXXXH)
(C0H)
(01H)
(2FH)
(03H)
codes)
OTP Setup
Ready
Ready
(Lock Error
[Botch])
Ready
(Lock Dow n
Blk)
Ready
(Lock Block)
Ready
(Set CR)
Ready (Lock Error
[Botch])
N/A
OTP Busy
Ready
N/A
Word Program Busy
Word Program Busy
Ready
Word Program Suspend
BP Load 1 {Give w ord count load [N-1]}; If N=0 (w ord count =1) go to BP Confirm;
Els e (N not = 0) go to BP Load 2
N/A
BP Load 2 (Give data load)
Exit
BP Confirm w hen count=0, ELSE BP load 2 (note: BP w ill Botch at this point if any
block address is different from the first address)
Ready (Error [Botch])
BP Busy
Ready
N/A
BP Suspend
Ready (Error [Botch])
Erase Busy
Ready
Erase Suspend
N/A
Word Program Busy in Erase Suspend
Word Program Busy in Erase Suspend Busy
Erase
Suspend
Word Program Suspend in Erase Suspend
N/A
70
Datasheet
INTEL [ INTEL ]
