28F640L30, 28F128L30, 28F256L30
12.3
Program and Erase Characteristics
VPPL
VPPH
Nbr.
Symbol
Parameter
Units Notes
Min Typ Max Min Typ Max
Conventional Word Programming
Single word
150 TBD
30 TBD
150 TBD
30 TBD
Program
Time
W200
t
µs
µs
1
1
PROG/W
Single cell
Buffered Programming
W200
W251
t
t
Single word
150 TBD
640 TBD
150 TBD
288 864
Program
Time
PROG/W
One Buffer (32 words)
BUFF
Buffered Enhanced Factory Programming
W451
t
t
Single word
N/A N/A N/A N/A
7
21
1,2
1
BEFP/W
Program
µs
BEFP/
W452
Buffered EFP Setup
N/A N/A N/A
5
N/A N/A
Setup
Erasing and Suspending
W500
W501
t
t
t
t
16-KWord Parameter
64-KWord Main
0.4
0.8
20
2.5
4
0.4
0.7
20
2.5
4
ERS/PB
ERS/MB
SUSP/P
SUSP/E
Erase Time
s
1
W600
Program suspend
Erase suspend
25
25
25
25
Suspend
Latency
µs
W601
20
20
NOTES:
1. Typical values measured at T = +25 °C and nominal voltages. Performance numbers are valid for all speed
C
versions. Excludes system overhead. Sampled, but not 100% tested.
2. Averaged over entire device.
12.4
Reset Specifications
Nbr. Symbol
Parameter
RST# pulse width low
Min
Max
Unit
Notes
P1
P2
P3
t
t
t
100
ns
1,2,3,4
1,3,4,7
1,3,4,7
1,4,5,6
PLPH
RST# low to device reset during erase
RST# low to device reset during program
25
25
PLRH
µs
V
Power valid to RST# de-assertion (high)
60
VCCPH
CC
NOTES:
1. These specifications are valid for all device versions (packages and speeds).
2. The device may reset if t is <t MIN, but this is not guaranteed.
PLPH
PLPH
3. Not applicable if RST# is tied to Vcc.
4. Sampled, but not 100% tested.
5. If RST# is tied to the V supply, device will not be ready until t
after V >= V min.
CC CC
CC
VCCPH
6. If RST# is tied to any supply/signal with V
voltage levels, the RST# input voltage must not exceed V
CCQ
CC
until V >= V (min).
CC
CC
7. Reset completes within t
if RST# is asserted while no erase or program operation is executing.
PLPH
64
Datasheet
INTEL [ INTEL ]
