LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver
Figure 26. Typical LXT971A-to-5 V Fiber Transceiver Interface Circuitry
+5V
+3.3V
+3.3V
0.01µF
− 0.1µF
0.01µF
− 0.1µF
16Ω
1.1kΩ
1.1kΩ
50Ω
50Ω
0.01µF
0.01µF
TD -
TPFON
TPFOP
TD +
3.1kΩ
3.1kΩ
Fiber Txcvr
LXT971A
2
ON Semiconductor
MC100LVEL92
SD/TP
SD
PECL-to-LVPECL
Logic Translator
+3.3V
1
0.01µF
− 0.1µF
102Ω
102Ω
0.01µF
0.01µF
RD -
TPFIN
TPFIP
RD +
154Ω
154Ω
270Ω
270Ω
1. Refer to the transceiver manufacturer’s recommendations for termination circuitry.
2. See Figure 27 for recommended logic translator interface circuitry.
54
Datasheet
Document #: 249414
Revision #: 002
Rev. Date: August 7, 2002
INTEL [ INTEL ]
