LXT971A 3.3 V Dual-Speed Fast Ethernet Transceiver
Contents
1.0
2.0
3.0
Pin Assignments ..............................................................................................................................12
Signal Descriptions..........................................................................................................................16
Functional Description.....................................................................................................................21
3.1
Introduction .......................................................................................................................21
3.1.1
3.1.2
Comprehensive Functionality .............................................................................21
OSP™ Architecture ............................................................................................21
3.2
Network Media / Protocol Support....................................................................................22
3.2.1
10/100 Network Interface ...................................................................................22
3.2.1.1 Twisted-Pair Interface ..........................................................................22
3.2.1.2 Fiber Interface.......................................................................................22
3.2.1.3 Fault Detection and Reporting..............................................................23
MII Data Interface...............................................................................................23
3.2.2.1 Increased MII Drive Strength...............................................................23
Configuration Management Interface .................................................................24
3.2.3.1 MDIO Management Interface ..............................................................24
3.2.3.2 Hardware Control Interface..................................................................25
3.2.2
3.2.3
3.3
3.4
Operating Requirements....................................................................................................26
3.3.1
3.3.2
Power Requirements ...........................................................................................26
Clock Requirements............................................................................................26
3.3.2.1 External Crystal/Oscillator ...................................................................26
3.3.2.2 MDIO Clock.........................................................................................26
Initialization.......................................................................................................................26
3.4.1
3.4.2
3.4.3
MDIO Control Mode ..........................................................................................26
Hardware Control Mode .....................................................................................27
Reduced Power Modes........................................................................................28
3.4.3.1 Hardware Power Down ........................................................................28
3.4.3.2 Software Power Down..........................................................................29
3.4.3.3 Sleep Mode...........................................................................................29
Reset....................................................................................................................29
Hardware Configuration Settings........................................................................30
3.4.4
3.4.5
3.5
3.6
Establishing Link...............................................................................................................31
3.5.1
Auto-Negotiation ................................................................................................31
3.5.1.1 Base Page Exchange.............................................................................31
3.5.1.2 Next Page Exchange.............................................................................31
3.5.1.3 Controlling Auto-Negotiation...............................................................31
Parallel Detection................................................................................................31
3.5.2
MII Operation....................................................................................................................32
3.6.1
3.6.2
3.6.3
3.6.4
3.6.5
3.6.6
3.6.7
MII Clocks ..........................................................................................................32
Transmit Enable ..................................................................................................33
Receive Data Valid .............................................................................................33
Carrier Sense.......................................................................................................33
Error Signals .......................................................................................................33
Collision..............................................................................................................33
Loopback.............................................................................................................34
3.6.7.1 Operational Loopback ..........................................................................35
Datasheet
3
Document #: 249414
Revision #: 002
Rev. Date: August 7, 2002
INTEL [ INTEL ]
