1-Gbit P30 Family
Table 28.
Status Register Description (Sheet 2 of 2)
Status Register (SR)
Default Value = 0x80
0 = Erase successful.
1 = Erase fail or program sequence error when set with SR[4,7].
5
4
3
2
1
Erase Status (ES)
Program Status (PS)
PP Status (VPPS)
0 = Program successful.
1 = Program fail or program sequence error when set with SR[5,7]
0 = VPP within acceptable limits during program or erase operation.
1 = VPP < VPPLK during program or erase operation.
V
Program Suspend Status 0 = Program suspend not in effect.
(PSS)
1 = Program suspend in effect.
Block-Locked Status
(BLS)
0 = Block not locked during program or erase.
1 = Block locked during program or erase; operation aborted.
DWS BWS
0
0
1
1
0
1
0
1
= WSM is busy and buffer is available for loading.
= WSM is busy and buffer is not available for loading.
= WSM is not busy and buffer is available for loading.
= Reserved for Future Use (RFU).
0
BEFP Status (BWS)
Note:
Always clear the Status Register prior to resuming erase operations. It avoids Status Register
ambiguity when issuing commands during Erase Suspend. If a command sequence error occurs
during an erase-suspend state, the Status Register contains the command sequence error status
(SR[7,5,4] set). When the erase operation resumes and finishes, possible errors during the erase
operation cannot be detected via the Status Register because it contains the previous error status.
14.1.1
Clear Status Register
The Clear Status Register command clears the status register. It functions independent of VPP. The
Write State Machine (WSM) sets and clears SR[7,6,2], but it sets bits SR[5:3,1] without clearing
them. The Status Register should be cleared before starting a command sequence to avoid any
ambiguity. A device reset also clears the Status Register.
14.2
Read Device Identifier
The Read Device Identifier command instructs the device to output manufacturer code, device
identifier code, block-lock status, protection register data, or configuration register data (see
Section 9.2, “Device Commands” on page 50 for details on issuing the Read Device Identifier
command). Table 29, “Device Identifier Information” on page 77 and Table 30, “Device ID codes”
on page 77 show the address offsets and data values for this device.
April 2005
76
Intel StrataFlash® Embedded Memory (P30)
Order Number: 306666, Revision: 001
Datasheet
INTEL [ INTEL ]
