MAX 3000A Programmable Logic Device Family Data Sheet
See the Altera web site (http://www.altera.com) or the Altera Digital
Library for pin–out information.
Device
Pin–Outs
Figures 14 through 18 show the package pin–out diagrams for
MAX 3000A devices.
Figure 14. 44–Pin PLCC/TQFP Package Pin–Out Diagram
Package outlines not drawn to scale.
Pin 34
Pin 1
6
5
4
3
2
1 44 43 42 41 40
7
39
38
37
36
35
34
33
32
31
30
29
I/O/TDI
I/O
I/O
I/O/TDI
I/O
I/O
8
I/O/TDO
I/O
I/O/TDO
9
I/O
I/O
I/O
10
11
12
13
14
15
16
17
GND
I/O
GND
VCC
I/O
GND
I/O
GND
VCC
I/O
I/O
EPM3032A
EPM3064A
EPM3032A
EPM3064A
I/O
I/O/TMS
I/O
I/O
I/O/TMS
I/O
I/O/TCK
I/O
I/O
I/O/TCK
I/O
VCC
I/O
VCC
GND
I/O
GND
I/O
GND
I/O
GND
18 19 20 21 22 23 24 25 26 27 28
Pin 12
Pin 23
44-Pin PLCC
44-Pin TQFP
42
Altera Corporation
INTEL [ INTEL ]
