5–24
Chapter 5: DC and Switching Characteristics
Timing Model and Specifications
Table 5–31. MAX II IOE Programmable Delays
MAX II / MAX IIG
MAX IIZ
–3 Speed
Grade
–4 Speed
Grade
–5 Speed
Grade
–6 Speed
Grade
–7 Speed
Grade
–8 Speed
Grade
Parameter
Min Max Min Max Min Max Min Max Min Max Min Max Unit
Input Delay from Pin to
Internal Cells = 1
—
1,225
—
1,592
—
1,960
—
1,858
—
2,171
—
2,214 ps
Input Delay from Pin to
Internal Cells = 0
—
89
—
115
—
142
—
569
—
609
—
616
ps
Maximum Input and Output Clock Rates
Table 5–32 and Table 5–33 show the maximum input and output clock rates for
standard I/O pins in MAX II devices.
Table 5–32. MAX II Maximum Input Clock Rate for I/O
MAX II / MAX IIG
MAX IIZ
–3 Speed –4 Speed –5 Speed –6 Speed –7 Speed –8 Speed
I/O Standard
Without Schmitt
Grade
Grade
Grade
Grade
Grade
Grade
Unit
3.3-V LVTTL
304
304
304
304
304
304
MHz
Trigger
With Schmitt
Trigger
250
304
250
220
188
220
188
200
200
150
304
250
304
250
220
188
220
188
200
200
150
304
250
304
250
220
188
220
188
200
200
150
304
250
304
250
220
188
220
188
200
200
150
304
250
304
250
220
188
220
188
200
200
150
304
250
304
250
220
188
220
188
200
200
150
304
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
3.3-V LVCMOS
2.5-V LVTTL
Without Schmitt
Trigger
With Schmitt
Trigger
Without Schmitt
Trigger
With Schmitt
Trigger
2.5-V LVCMOS
Without Schmitt
Trigger
With Schmitt
Trigger
1.8-V LVTTL
1.8-V LVCMOS
1.5-V LVCMOS
3.3-V PCI
Without Schmitt
Trigger
Without Schmitt
Trigger
Without Schmitt
Trigger
Without Schmitt
Trigger
MAX II Device Handbook
© August 2009 Altera Corporation
INTEL [ INTEL ]
