Chapter 5: DC and Switching Characteristics
5–23
Timing Model and Specifications
Table 5–29. External Timing Output Delay and tOD Adders for Fast Slew Rate
MAX II / MAX IIG
MAX IIZ
–3 Speed
Grade
–4 Speed
Grade
–5 Speed
Grade
–6 Speed
Grade
–7 Speed
Grade
–8 Speed
Grade
I/O Standard
3.3-V LVTTL 16 mA
8 mA
Min Max Min Max Min Max Min Max Min Max Min Max Unit
—
—
—
—
—
—
—
—
—
—
—
0
65
—
—
—
—
—
—
—
—
—
—
—
0
84
—
—
—
—
—
—
—
—
—
—
—
0
—
—
—
—
—
—
—
—
—
—
—
0
—
—
—
—
—
—
—
—
—
—
—
0
—
—
—
—
—
—
—
—
—
—
—
0
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
104
0
–6
–2
–3
3.3-V LVCMOS 8 mA
4 mA
0
0
0
0
0
65
84
104
195
309
909
1,046
1,694
1,867
5
–6
–2
–3
2.5-V LVTTL / 14 mA
122
193
568
654
1,059
1,167
3
158
251
738
850
1,376
1,517
4
–63
10
–71
–1
–88
1
LVCMOS
7 mA
1.8-V LVTTL /
LVCMOS
6 mA
3 mA
128
352
421
757
–6
118
327
400
743
–2
118
332
400
743
–3
1.5-V LVCMOS 4 mA
2 mA
3.3-V PCI
20 mA
Table 5–30. External Timing Output Delay and tOD Adders for Slow Slew Rate
MAX II / MAX IIG
MAX IIZ
–3 Speed
Grade
–4 Speed
Grade
–5 Speed
Grade
–6 Speed
Grade
–7 Speed
Grade
–8 Speed
Grade
I/O Standard
3.3-V LVTTL 16 mA
8 mA
Min Max Min Max Min Max
Min Max Min Max Min Max
Unit
—
—
—
—
—
—
—
—
—
—
—
7,064
7,946
—
—
—
—
—
—
—
—
—
—
—
6,745
7,627
—
—
—
—
—
—
—
—
—
—
—
6,426
7,308
6,426
7,308
9,796
10,910
22,289
24,093
38,085
40,692
418
—
—
—
—
—
—
—
—
—
—
—
5,966
6,541
5,966
6,541
9,141
9,861
21,811
23,081
39,121
40,631
6,644
—
—
—
—
—
—
—
—
—
—
—
5,992
6,570
5,992
6,570
9,154
9,874
21,854
23,034
39,124
40,634
6,627
—
—
—
—
—
—
—
—
—
—
—
6,118
6,720
6,118
6,720
9,297
ps
ps
ps
ps
ps
3.3-V LVCMOS 8 mA
4 mA
7,064
6,745
7,946
7,627
2.5-V LVTTL / 14 mA
10,434
11,548
22,927
24,731
38,723
41,330
261
10,115
11,229
22,608
24,412
38,404
41,011
339
LVCMOS
7 mA
10,037 ps
21,857 ps
23,107 ps
39,124 ps
40,634 ps
1.8-V LVTTL /
LVCMOS
6 mA
3 mA
1.5-V LVCMOS 4 mA
2 mA
3.3-V PCI
20 mA
6,914
ps
© August 2009 Altera Corporation
MAX II Device Handbook
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