MultiTrack Interconnect
Figure 2–11. LUT Chain & Register Chain Interconnects
Local Interconnect
Routing Among LEs
in the LAB
LE0
LUT Chain
Routing to
Adjacent LE
Register Chain
Routing to Adjacent
LE's Register Input
LE1
LE2
LE3
LE4
LE5
LE6
LE7
LE8
Local
Interconnect
LE9
The C4 interconnects span four LABs up or down from a source LAB.
Every LAB has its own set of C4 interconnects to drive either up or down.
Figure 2–12 shows the C4 interconnect connections from an LAB in a
column. The C4 interconnects can drive and be driven by column and
row IOEs. For LAB interconnection, a primary LAB or its vertical LAB
neighbor can drive a given C4 interconnect. C4 interconnects can drive
each other to extend their range as well as drive row interconnects for
column-to-column connections.
2–18
Core Version a.b.c variable
Altera Corporation
August 2006
MAX II Device Handbook, Volume 1
INTEL [ INTEL ]
