Operating Conditions
Table 5–8. 1.8-V I/O Specifications
Symbol
VCCIO (1)
VIH
Parameter
Output supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Conditions
Minimum
1.71
Maximum
1.89
Unit
V
0.65 × VCCIO
–0.30
2.25
V
VIL
0.35 × VCCIO
V
VOH
IOH = –2 mA (2)
IOL = 2 mA (2)
VCCIO – 0.45
V
VOL
0.45
V
Notes to Table 5–8:
(1) The Stratix II device family’s VC CIO voltage level support of 1.8 -5% is narrower than defined in the Normal
Range of the EIA/JEDEC standard.
(2) This specification is supported across all the programmable drive settings available for this I/O standard as shown
in the Stratix II Architecture chapter in volume 1 of the Stratix II Device Handbook.
Table 5–9. 1.5-V I/O Specifications
Symbol
VCCIO (1)
VIH
Parameter
Output supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Conditions
Minimum
1.425
Maximum
1.575
Unit
V
0.65 × VCCIO
–0.30
VCCIO + 0.30
0.35 × VCCIO
V
VIL
V
VOH
IOH = –2 mA (2)
IOL = 2 mA (2)
0.75 × VCCIO
V
VOL
0.25 × VCCIO
V
Notes to Table 5–9:
(1) The Stratix II device family’s VC CIO voltage level support of 1.5 -5% is narrower than defined in the Normal
Range of the EIA/JEDEC standard.
(2) This specification is supported across all the programmable drive settings available for this I/O standard as shown
in the Stratix II Architecture chapter in volume 1 of the Stratix II Device Handbook.
Figures 5–1 and 5–2 show receiver input and transmitter output
waveforms, respectively, for all differential I/O standards (LVDS,
LVPECL, and HyperTransport technology).
5–6
Altera Corporation
April 2011
Stratix II Device Handbook, Volume 1
INTEL [ INTEL ]
