Operating Conditions
Table 5–2. Maximum Duty Cycles in Voltage Transitions
Maximum
Duty Cycles
Symbol
Parameter
Condition
Unit
VI
Maximum duty cycles
in voltage transitions
VI = 4.0 V
VI = 4.1 V
VI = 4.2 V
VI = 4.3 V
VI = 4.4 V
VI = 4.5 V
100
90
50
30
17
10
%
%
%
%
%
%
Recommended Operating Conditions
Table 5–3 contains the Stratix II device family recommended operating
conditions.
Table 5–3. Stratix II Device Recommended Operating Conditions (Part 1 of 2)
Note (1)
Symbol
VCCINT
VCCIO
Parameter
Conditions
Minimum Maximum Unit
Supply voltage for internal logic
100 μs ≤ risetime ≤ 100 ms (3)
100 μs ≤ risetime ≤ 100 ms (3), (6)
1.15
1.25
V
V
Supply voltage for input and
output buffers, 3.3-V operation
3.135
(3.00)
3.465
(3.60)
Supply voltage for input and
output buffers, 2.5-V operation
100 μs ≤ risetime ≤ 100 ms (3)
100 μs ≤ risetime ≤ 100 ms (3)
2.375
2.625
V
V
V
V
V
Supply voltage for input and
output buffers, 1.8-V operation
1.71
1.89
Supply voltage for output buffers, 100 μs ≤ risetime ≤ 100 ms (3)
1.5-V operation
1.425
1.14
1.575
1.26
Supply voltage for input and
output buffers, 1.2-V operation
100 μs ≤ risetime ≤ 100 ms (3)
VCCPD
Supply voltage for pre-drivers as 100 μs ≤ risetime ≤ 100 ms (4)
well as configuration and JTAG
3.135
3.465
I/O buffers.
VCCA
VCCD
VI
Analog power supply for PLLs
Digital power supply for PLLs
Input voltage (see Table 5–2)
Output voltage
100 μs ≤ risetime ≤ 100 ms (3)
100 μs ≤ risetime ≤ 100 ms (3)
(2), (5)
1.15
1.15
–0.5
0
1.25
1.25
4.0
V
V
V
V
VO
VCCIO
5–2
Altera Corporation
April 2011
Stratix II Device Handbook, Volume 1
INTEL [ INTEL ]
