2-MBIT SmartVoltage BOOT BLOCK FAMILY
E
Start
Bus
Comments
Command
Operation
Data = 20H
Addr = Within Block to Be Erased
Write 20H,
Block Address
Write
Erase Setup
Erase
Confirm
Data = D0H
Addr = Within Block to Be Erased
Write
Read
Write D0H and
Block Address
Status Register Data Toggle CE#
or OE# to Update Status Register
Read Status
Register
Check SR.7
1 = WSM Ready
0 = WSM Busy
Suspend Erase
Loop
Standby
NO
0
YES
Suspend
Erase
SR.7 =
1
Repeat for subsequent block erasures.
Full Status Check can be done after each block erase, or after a
sequence of block erasures.
Write FFH after the last operation to reset device to read array mode.
Full Status
Check if Desired
Block Erase
Complete
FULL STATUS CHECK PROCEDURE
Bus
Operation
Read Status Register
Data (See Above)
Command
Comments
Check SR.3
1 = VPP Low Detect
Standby
1
SR.3 =
0
VPP Range Error
Check SR.4,5
Both 1 = Command Sequence Error
Standby
Standby
1
1
Command Sequence
Error
Check SR.5
1 = Block Erase Error
SR.4,5 =
0
SR.3 MUST be cleared, if set during an erase attempt, before further
attempts are allowed by the Write State Machine.
Block Erase Error
SR.5 =
0
SR.5 is only cleared by the Clear Status Register Command, in
cases where multiple blocks are erase before full status is checked.
If error is detected, clear the Status Register before attempting
retry or other error recovery.
Block Erase Successful
0530_10
Figure 10. Automated Block Erase Flowchart
24
SEE NEW DESIGN RECOMMENDATIONS
INTEL [ INTEL ]
