E
2-MBIT SmartVoltage BOOT BLOCK FAMILY
Start
Bus
Operation
Command
Comments
Setup
Program
Data = 40H
Addr = Word/Byte to Program
Write 40H,
Write
Word/Byte Address
Data = Data to Program
Addr = Location to Program
Program
Write
Read
Write Word/Byte
Data/Address
Status Register Data Toggle CE#
or OE# to Update SRD
Read
Status Register
Check SR.7
Standby
1 = WSM Ready
0 = WSM Busy
NO
Repeat for subsequent word/byte program operations.
SR Full Status Check can be done after each word/byte program,
or after a sequence of word/byte programs.
SR.7 = 1
?
Write FFH after the last program operation to reset device to
read array mode.
YES
Full Status
Check if Desired
Word/Byte Program
Complete
FULL STATUS CHECK PROCEDURE
Bus
Operation
Read Status Register
Data (See Above)
Command
Comments
Check SR.3
1 = VPP Low Detect
Standby
1
SR.3 =
0
VPP Range Error
Check SR.4
1 = Word/Byte Program Error
Standby
1
Word/Byte Program
Error
SR.4 =
SR.3 MUST be cleared, if set during a program attempt, before further
attempts are allowed by the Write State Machine.
0
SR.4 is only cleared by the Clear Status Register Command, in cases
where multiple bytes are programmed before full status is checked.
Word/Byte Program
Successful
If error is detected, clear the Status Register before attempting retry or
other error recovery.
0530_09
Figure 9. Automated Word/Byte Programming Flowchart
23
SEE NEW DESIGN RECOMMENDATIONS
INTEL [ INTEL ]
