SMART 5 BOOT BLOCK MEMORY FAMILY
E
REVISION HISTORY
Number
-001
Description
Original Version
-002
Minor changes throughout document.
Section 3.1.5 and Figure 14 redone to clarify program/erase operation abort.
Information added to Table 2, Figure 1, and Section 3.3 to clarify WP# on 8-Mbit,
44-PSOP.
Read and Write Waveforms changed to numbered format.
Typical numbers removed from DC Characteristics and Erase/Program Timings.
-003
-004
Minor text changes throughout document.
Figure 1, 44-PSOP pinout: mistake on pin 3 on 2-Mbit pinout corrected from A17 to NC.
Specs tEHQZ and tGHQZ improved.
Explanations of program/erase abort commands reworked in Table 6, Command
Codes.
Specifications for 28F004B5 40-TSOP version added; Erase suspend text and
flowchart updated for clarity (Section 3.2.5.1, Table 6, Figure 10)
4
ADVANCE INFORMATION
INTEL [ INTEL ]
