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82915GV 参数 Datasheet PDF下载

82915GV图片预览
型号: 82915GV
PDF下载: 下载PDF文件 查看货源
内容描述: Express芯片组 [Express Chipset]
分类和应用:
文件页数/大小: 426 页 / 3241 K
品牌: INTEL [ INTEL ]
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Signal Description  
R
Signal Name  
Type  
Description  
SDQS_B[7:0]  
I/O  
SSTL-  
2/1.8  
2x  
Data Strobes: For DDR the rising and falling edges of SDQS_Bx are  
used for capturing data during read and write transactions. For DDR2,  
SDQS_Bx and its complement SDQS_Bx# make up a differential strobe  
pair. The data is captured at the crossing point of SDQS_Bx and its  
complement SDQS_Bx# during read and write transactions.  
SDQS_B[7:0]#  
SCKE_B[3:0]  
SODT_B[3:0]  
I/O  
SSTL-1.8  
2x  
Data Strobe Complements (DDR2 only): These signals are the  
complementary DDR2 Strobe signals.  
O
SSTL-  
2/1.8  
Clock Enable: (1 per Rank) SCKE_B is used to initialize the SDRAMs  
during power-up, to power-down SDRAM ranks, and to place all SDRAM  
ranks into and out of self-refresh during Suspend-to-RAM.  
O
On Die Termination (DDR2 only): Active On-die Termination Control  
signals for DDR2 devices.  
SSTL-1.8  
2.4  
DDR/DDR2 DRAM Reference and Compensation  
Note that the 82910GL, 82915GL, and 82915PL (G)MCH only supports DDR DRAM.  
Signal Name  
Type  
Description  
SRCOMP[1:0]  
SOCOMP[1:0]  
I/O  
System Memory RCOMP  
I/O  
A
DDR2 On-Die DRAM Over Current Detection (OCD) driver  
compensation (DDR2 only)  
SM_SLEWIN[1:0]  
I
Buffer Slew Rate Input: Slew Rate characterization buffer input for X  
and Y orientation.  
A
SM_SLEWOUT[1:0]  
SMVREF[1:0]  
O
A
Buffer Slew Rate Output: Slew Rate characterization buffer output for X  
and Y orientation  
I
SDRAM Reference Voltage: Reference voltage inputs for each DQ,  
A
DM, DQS, and DQS# input signals.  
40  
Datasheet