80C186EC/188EC, 80L186EC/188EC
AC CharacteristicsÐ80L186EC16 (Continued)
NOTES:
1. See AC Timing Waveforms, for waveforms and definition.
2. Measure at V for high time, V for low time.
IH IL
3. Only required to guarantee I . Maximum limits are bounded by T , T
CC
and T
.
CL
C
CH
4. Specified for a 50 pF load, see Figure 14 for capacitive derating information.
5. Specified for a 50 pF load, see Figure 15 for rise and fall times outside 50 pF.
6. See Figure 15 for rise and fall times.
7. T
8. T
applies to BHE (RFSH), LOCK and A19:16 only after a HOLD release.
applies to RD and WR only after a HOLD release.
CHOV1
CHOV2
9. Setup and Hold are required to guarantee recognition.
10. Setup and Hold are required for proper operation.
Relative Timings (80C186EC-25/20/13, 80L186EC-16/13)
Symbol
Parameter
Min
Max
Unit
Notes
RELATIVE TIMINGS
b
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
ALE Active Pulse Width
T
15
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
LHLL
b
AD Valid Setup before ALE Falls
Chip Select Valid before ALE Falls
AD Hold after ALE Falls
(/2T
(/2T
(/2T
(/2T
(/2T
(/2T
10
10
10
15
15
10
AVLL
PLLL
b
b
b
b
b
1
LLAX
LLWL
LLRL
ALE Falling to WR Falling
ALE Falling to RD Falling
1
1
1
WR Rising to Next ALE Rising
AD Float to RD Falling
WHLH
AFRL
RLRH
WLWH
RHAX
WHDX
WHPH
RHPH
PHPL
0
b
b
RD Active Pulse Width
2T
2T
5
5
2
2
WR Active Pulse Width
b
15
RD Rising to Next Address Active
Output Data Hold after WR Rising
WR Rise to Chip Select Rise
RD Rise to Chip Select Rise
T
T
b
15
b
(/2T
(/2T
(/2T
10
10
10
1
1
1
b
b
Chip Select Inactive to Next Chip
Select Active
T
T
T
ONCE Active Setup to RESIN Rising
ONCE Hold after RESIN Rise
T
ns
ns
ns
OVRH
RHOX
IHIL
T
b
INTA High to Next INTA Low
during INTA Cycle
4T
2T
5
5
4
b
T
T
INTA Active Pulse Width
ns
ns
2, 4
2, 4
ILIH
CAS2:0 Setup before 2nd INTA
Pulse Low
8T
CVIL
T
T
T
T
CAS2:0 Hold after 2nd INTA Pulse Low
Interrupt Resolution Time
4T
ns
ns
ns
ns
2, 4
3
ILCX
IRES
IRLH
IRHIF
150
IR Low Time to Reset Edge Detector
IR Hold Time after 1st INTA Falling
50
25
4, 5
35
INTEL [ INTEL ]
