80C186EC/188EC, 80L186EC/188EC
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings
NOTICE: This data sheet contains preliminary infor-
mation on new products in production. The specifica-
tions are subject to change without notice. Verify with
your local Intel Sales office that you have the latest
data sheet before finalizing a design.
b
a
Storage Temperature ÀÀÀÀÀÀÀÀÀÀ 65 C to 150 C
§
§
*WARNING: Stressing the device beyond the ‘‘Absolute
Maximum Ratings’’ may cause permanent damage.
These are stress ratings only. Operation beyond the
‘‘Operating Conditions’’ is not recommended and ex-
tended exposure beyond the ‘‘Operating Conditions’’
may affect device reliability.
b
a
Case Temperature Under BiasÀÀÀ 65 C to 100 C
§
§
Supply Voltage
b
a
with Respect to V ÀÀÀÀÀÀÀÀÀÀÀ 0.5V to 6.5V
SS
Voltage on Other Pins
with Respect to V
b
ÀÀÀÀÀÀ 0.5V to V
a
0.5V
SS
CC
Low inductance capacitors and interconnects are
recommended for best high frequency electrical per-
formance. Inductance is reduced by placing the de-
coupling capacitors as close as possible to the proc-
Recommended Connections
Power and ground connections must be made to
multiple V and V pins. Every 80C186EC-based
essor V
and V package pins.
SS
CC SS
circuit board should include separate power (V
CC
)
CC
pin must be
and ground (V ) planes. Every V
SS
Always connect any unused input to an appropriate
signal level. In particular, unused interrupt inputs
(NMI, INT0:7) should be connected to V through a
CC
connected to the power plane, and every V
pin
SS
must be connected to the ground plane. Liberal de-
coupling capacitance should be placed near the
processor. The processor can cause transient pow-
er surges when its output buffers transition, particu-
larly when connected to large capacitive loads.
SS
pull-down resistor. Leave any unused output pin un-
connected.
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