80960SA 参数 Datasheet PDF下载

LIST OF FIGURES

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The 80960SA Processor’s Highly Parallel Architecture ................................................................ 0

80960SA Programming Environment ........................................................................................... 1

Instruction Formats ...................................................................................................................... 4

Multiple Register Sets Are Stored On-Chip .................................................................................. 5

Connection Recommendation for LOCK .................................................................................... 11

Typical Supply Current vs. Case Temperature ........................................................................... 12

Typical Current vs. Frequency (Room Temp) ............................................................................. 12

Typical Current vs. Frequency (Hot Temp) ................................................................................. 13

Capacitive Derating Curve ......................................................................................................... 13

Test Load Circuit for Three-State Output Pins ............................................................................ 13

Drive Levels and Timing Relationships for 80960SA Signals ..................................................... 15

Processor Clock Pulse (CLK2) ................................................................................................... 19

RESET Signal Timing ................................................................................................................. 19

HOLD Timing .............................................................................................................................. 20

80-Lead EIAJ Quad Flat Pack (QFP) Package .......................................................................... 21

84-Lead Plastic Leaded Chip Carrier (PLCC) Package ............................................................. 22

Non-Burst Read and Write Transactions Without Wait States .................................................... 28

Quad Word Burst Read Transaction With 1, 0, 0, 0, 0, 0, 0, 0 Wait States ................................ 29

Burst Write Transaction With 2, 1, 1, 1 Wait States (6-8 Bytes Transferred) .............................. 30

Accesses Generated by Quad Word Read Bus Request,

Misaligned One Byte from Quad Word Boundary 1, 0, 0, 0, 0, 0, 0, 0 Wait States ..................... 31

Interrupt Acknowledge Cycle ...................................................................................................... 32

Cold Reset Waveform ................................................................................................................ 33

LIST OF TABLES

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Table 15

80960SA Instruction Set .............................................................................................................. 3

Memory Addressing Modes ......................................................................................................... 4

80960SA Pin Description: Bus Signals ........................................................................................ 8

80960SA Pin Description: Support Signals ................................................................................ 10

DC Characteristics ..................................................................................................................... 14

80960SA AC Characteristics (10 MHz) ...................................................................................... 16

80960SA AC Characteristics (16 MHz) ...................................................................................... 17

80960SA AC Characteristics (20 MHz) ...................................................................................... 18

80960SA QFP Pinout — In Pin Order ........................................................................................ 23

80960SA QFP Pinout — In Signal Order ................................................................................... 24

80960SA PLCC Pinout — In Pin Order ...................................................................................... 25

80960SA PLCC Pinout — In Signal Order ................................................................................. 26

80960SA QFP Package Thermal Characteristics ...................................................................... 27

80960SA PLCC Package Thermal Characteristics .................................................................... 27

Die Stepping Cross Reference ................................................................................................... 27

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