80960SA
Control
Opcode
Displacement
Compare and
Branch
Register to
Register
Opcode
Reg/Lit
Reg
M
Displacement
Opcode
Reg
Reg/Lit
Modes
Ext’d Op
Reg/Lit
Memory Access---
Short
Memory Access---
Long
Opcode
Reg
Base
M
X
Offset
Opcode
Reg
Base
Mode
Scale
xx
Offset
Displacement
Figure 3. Instruction Formats
1.1.1
Memory Space And Addressing Modes
1.1.2
Data Types
The 80960SA offers a linear programming
environment so that all programs running on the
processor are contained in a single address space.
Maximum address space size is 4 Gigabytes (2
32
bytes).
For ease of use the 80960SA has a small number of
addressing modes, but includes all those necessary
to ensure efficient execution of high-level languages
such as C. Table 2 lists the memory addressing
modes.
Table 2. Memory Addressing Modes
•
•
•
•
•
•
•
•
12-Bit Offset
32-Bit Offset
Register-Indirect
Register + 12-Bit Offset
Register + 32-Bit Offset
Register + (Index-Register x Scale-Factor)
Register x Scale Factor + 32-Bit Displacement
Register + (Index-Register x Scale-Factor) + 32-
Bit Displacement
The 80960SA recognizes the following data types:
Numeric:
•
•
8-, 16-, 32- and 64-bit ordinals
8-, 16-, 32- and 64-bit integers
Non-Numeric:
•
•
•
•
Bit
Bit Field
Triple Word (96 bits)
Quad-Word (128 bits)
Large Register Set
1.1.3
The 80960SA programming environment includes a
large number of registers. In fact, 32 registers are
available at any time. The availability of this many
registers greatly reduces the number of memory
accesses required to perform algorithms, which
leads to greater instruction processing speed.
There are two types of general-purpose register:
local and global. The global registers consist of
sixteen 32-bit registers (g0 though g15). These
registers perform the same function as the general-
Scale-Factor is 1, 2, 4, 8 or 16
4