80186/80188 High-Integration 16-Bit Microprocessors
CONTENTS
PAGE
CONTENTS
PAGE
FUNCTIONAL DESCRIPTION ÀÀÀÀÀÀÀÀÀÀÀÀÀ 9
ABSOLUTE MAXIMUM RATINGS ÀÀÀÀÀÀÀÀ 15
D.C. CHARACTERISTICS ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ 15
A.C. CHARACTERISTICS ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ 16
Introduction ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ 9
CLOCK GENERATOR ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ 9
Oscillator ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ 9
Clock Generator ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ 9
READY Synchronization ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ 9
RESET Logic ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ 9
EXPLANATION OF THE AC
SYMBOLS ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ 18
WAVEFORMS ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ 19
EXPRESS ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ 25
EXECUTION TIMINGS ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ 26
INSTRUCTION SET SUMMARY ÀÀÀÀÀÀÀÀÀÀ 27
FOOTNOTES ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ 32
REVISION HISTORY ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ 33
LOCAL BUS CONTROLLER ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ 9
Memory/Peripheral Control ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ 10
Local Bus Arbitration ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ 10
Local Bus Controller and Reset ÀÀÀÀÀÀÀÀÀÀÀÀ 10
PERIPHERAL ARCHITECTURE ÀÀÀÀÀÀÀÀÀÀ 10
Chip-Select/Ready Generation Logic ÀÀÀÀÀÀ 10
DMA Channels ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ 11
Timers ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ 11
Interrupt Controller ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ 12
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INTEL [ INTEL ]
