Signal Description
Table 2-11. Normal Functional Pin Straps (Sheet 3 of 3)
Strap Pin
Function
SMBUS[5]
SMBus Addressing Straps: Sets the SMBus address.
SMBus Addressing:
SMBUS[3:1]
Bit 7----------------------------‘1’
Bit 6----------------------------‘1’
Bit 5----------------------------SMBUS[5]
Bit 4----------------------------‘0’
Bit 3---------------------------- SMBUS[3]
Bit 2---------------------------- SMBUS[2]
Bit 1---------------------------- SMBUS[1]
Sampled on the rising edge of PWROK.
2.10
Signal Summary
2.10.1
Signals, Interfaces and Power Planes
Table 2-12. Intel® 6700PXH 64-bit PCI Hub Signals, Interfaces and Power Planes (Sheet 1 of 4)
Intel® 6700PXH
64-bit PCI Hub
Signal
Hot Plug Muxed
Signal (Parallel
Mode, 1-2 Slots)
No. of
Signals
Operating
Voltage
Interface
Type
Notes
EXP_CLK#
N/A
1
1
1
1
8
8
8
8
2
2
2
2
2
2
2
2
2
2
2
2
PCI Express*
PCI Express*
PCI Express*
PCI Express*
PCI Express*
PCI Express*
PCI Express*
PCI Express*
PCI
I
I
1.5V
1.5V
0.5V
0.5V
1.5V
1.5V
1.5V
1.5V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
100 MHz differential clock
100 MHz differential clock
Analog voltage
EXP_CLK
N/A
EXP_COMP[0]
EXP_COMP[1]
EXP_RXN[7:0]
EXP_RXP[7:0]
EXP_TXN[7:0]
EXP_TXP[7:0]
HxATNLED_1#
HxPWREN_1
HPx_PRST#
HPx_RST2#
HPx_SIC
N/A
I
N/A
I
Analog voltage
N/A
I
Serial data input
Serial data input
Serial data output
Serial data output
Common clock
N/A
I
N/A
I
N/A
I
N/A
O
O
O
O
I
N/A
Hot Plug
Common clock
HPx_RST1#
N/A
Hot Plug
Common clock
Hot Plug
Common clock
HxPWRLED2#
HxPCIXCAP1_2
HxCLKEN_1#
HxPWRLED1#
N/A
Hot Plug
Common clock
HPx_SID
Hot Plug
I
Common clock
HPx_SIL#
Hot Plug
I
Common clock
HPxSLOT[3]
HPxSLOT[2]
HPxSLOT[1]
HPxSLOT[0]
HPxSOC
Hot Plug
I
Common clock, straps
Common clock, straps
Common clock, straps
Common clock, straps
Common clock
Hot Plug
I
HxPRSNT1_1#
HxMRL_2#
HxPCIXCAP2_2
Hot Plug
I
Hot Plug
I
PCI / Hot Plug
O
Intel® 6700PXH 64-bit PCI Hub Datasheet
31