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6400 参数 Datasheet PDF下载

6400图片预览
型号: 6400
PDF下载: 下载PDF文件 查看货源
内容描述: 高级内存缓冲器 [Advanced Memory Buffer]
分类和应用:
文件页数/大小: 250 页 / 3863 K
品牌: INTEL [ INTEL ]
 浏览型号6400的Datasheet PDF文件第77页浏览型号6400的Datasheet PDF文件第78页浏览型号6400的Datasheet PDF文件第79页浏览型号6400的Datasheet PDF文件第80页浏览型号6400的Datasheet PDF文件第82页浏览型号6400的Datasheet PDF文件第83页浏览型号6400的Datasheet PDF文件第84页浏览型号6400的Datasheet PDF文件第85页  
SMBus Interface  
Figure 7-4. SMBus Configuration Double Word Write (Write Bytes, PEC Enabled)  
S
S
S
S
S
S
S
S
X011_XXX  
X011_XXX  
X011_XXX  
X011_XXX  
X011_XXX  
X011_XXX  
X011_XXX  
X011_XXX  
W
W
W
W
W
W
W
W
A
A
A
A
A
A
A
A
Cmd = 10011100  
Cmd = 00011100  
Cmd = 00011100  
Cmd = 00011100  
Cmd = 00011100  
Cmd = 00011100  
Cmd = 00011100  
Cmd = 01011100  
A
A
A
A
A
A
A
A
Reserved  
Device/Function  
Register[15:8]  
Register[7:0]  
Data[31:24]  
Data[23:16]  
Data[15:8]  
A
A
A
A
A
A
A
A
PEC  
PEC  
PEC  
PEC  
PEC  
PEC  
PEC  
PEC  
A
A
A
A
A
A
A
A
P
P
P
P
P
P
P
P
Data[7:0]  
Figure 7-5. SMBus Configuration Word Write (Block Write, PEC Disabled)  
A
ByteCount =6  
A
Reserved  
A
Device/Function  
Data[16:8]  
A
Reg Number[15:8]  
Data[7:0]  
A
Reg Number [7:0]  
S
X011_XXX  
WA Cmd = 11001010  
A
A
A P  
Figure 7-6. SMBus Configuration Byte Write (Write Bytes, PEC Disabled)  
S
S
S
S
S
X011_XXX  
X011_XXX  
X011_XXX  
X011_XXX  
X011_XXX  
W
W
W
W
W
A
A
A
A
A
Cmd = 10000100  
Cmd = 00000100  
Cmd = 00000100  
Cmd = 00000100  
Cmd = 01000100  
A
A
A
A
A
Reserved  
Device/Function  
Register[15:8]  
Register[7:0]  
Data[7:0]  
A
A
A
A
A
P
P
P
P
P
7.1.4  
SMBus Error Handling  
The SMBus slave interface handles two types of errors: internal and PEC. These errors  
manifest as a Not-Acknowledge (NACK) for the read command (End bit is set). If an  
internal error occurs during a configuration write, the final write command receives a  
NACK just before the stop bit. If the master receives a NACK, the entire configuration  
transaction should be reattempted.  
If the master supports packet error checking (PEC) and the PEC_en bit in the command  
is set, then the PEC byte is checked in the slave interface. If the check indicates a  
failure, then the slave will NACK the PEC packet.  
7.1.5  
SMBus Resets  
7.1.5.1  
SMBus Transactions During FBD Link Fast Reset  
When the FBD link transitions into Electrical Idle (disable state) from an active state,  
this causes a “fast” reset of all non-sticky registers in the AMB. SMB transactions  
underway during a “fast” reset will not complete normally.  
Intel® 6400/6402 Advanced Memory Buffer Datasheet  
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