Registers
14.5.3.4
UPDATED: Update Temp Diff Bit
Take new temperature sample and update the temp diff bit (INCREASING).
Device:
NodeID
Function: 3
Offset:
Bit
83h
Attr
Default
Description
7:1
RV
00h
reserved
0
RWS
0
UPDATE:
Write ‘1’ =
a. latch current temperature from the TEMP register for comparison
on next UPDATE and
b. update INCREASING bit of TEMPSTAT register based on the current
temperature and the last latched temperature;
c. Automatically clears this bit to ‘0’ after INCREASING bit is updated;
Write ‘0’ - no effect
14.5.3.5
TEMPSTAT: Thermal Sensor Status Register
This register controls and reports temperature status.
Device:
NodeID
Function: 3
Offset:
Bit
84h
Attr
Default
Description
7:6
5
RV
0
0
Reserved
RWST
NoAutoUpdate
‘1’ = turns off update of temp stat values so that forced values written in
by firmware are not overwritten
‘0’ = overtemp trip bits are continuously and automatically updated as
normal and increasing bit is updated through UPDATE register mechanism
4
RW
0
INCREASING
‘1’ = Temperature has increased since the last time UPDATE bit was set in
UPDATED register.
‘0’ = Temperature has not increased since the last time UPDATE bit was set
in UPDATED register.
This is reflected as the Rising/Falling value in the Thermal Trip field of
northbound FBD status 0.
3
2
RWST
RWST
0
0
OVERTEMPHI
‘1’ = Temperature is above or equal to TEMPHI.TRIP
‘0’ = Temperature is below TEMPHI.TRIP
OVERTEMPMID
‘1’ = Temperature is above or equal to TEMPMID.TRIP
‘0’ = Temperature is below TEMPMID.TRIP
This is reflected in the Thermal Trip value of northbound FBD status 0
1
0
RWST
RWST
0
0
OVERTEMPLO
‘1’ = Temperature is above or equal to TEMPLO.TRIP
‘0’ = Temperature is below TEMPLO.TRIP
This is reflected in the Thermal Trip value of northbound FBD status 0
TEMPHIENABLE
‘1’ = Allow OVERTEMPHI=1 to shut down the DDR channel, drop DDR
commands, log an error, and take FBD links to EI.
‘0’ = OVERTEMPHI=1 only logs an error.
202
Intel® 6400/6402 Advanced Memory Buffer Datasheet
INTEL [ INTEL ]
