7–42
Chapter 7: User Flash Memory in MAX V Devices
Creating Memory Content File
Memory Map for 4-Kbit Memory Initialization
Figure 7–39 shows the memory map initialization for the ALTUFM_I2C megafunction
of 4-Kbit memory. The ALTUFM_I2C megafunction byte address location of 00hto
FFhis mapped to the UFM block address location of 000hto 0FFh. The ALTUFM_I2C
megafunction byte address location of 100hto 1FFhis mapped to the UFM block
address location of 100hto 1FFh
.
Figure 7–39. Memory Map for 4-Kbit Memory Initialization
4-Kbit ALTUFM_I2C Megafunction
Logical Memory Contents
MIF or HEX File Contents – to represent
the data and address size for the UFM block
1FFh
1FFh
Address 100h in logical memory maps to
100h in the MIF/HEX file. Address 1FFh in logical
memory maps to 1FFh in the MIF/HEX file, and all
data in between follows the order in the
logical memory
Upper Half – Addresses
100h to 1FFh
100h
FFh
100h
0FFh
Address 00h in logical memory maps to
000h in the MIF/HEX file. Address FFh in logical
memory maps to 0FFh in the MIF/HEX file, and all
data in between follows the order in the
logical memory
Lower Half – Addresses
00h to FFh
00h
000h
Memory Map for 8-Kbit Memory Initialization
Figure 7–40 shows the memory map initialization for the ALTUFM_I2C megafunction
of 8-Kbit memory. The ALTUFM_I2C megafunction of 8-Kbit memory fully utilizes all
the memory locations in the UFM block.
Figure 7–40. Memory Map for 8-Kbit Memory Initialization
MIF or HEX File Contents - to represent the
actual data and address size for the UFM Block
1FFh
The upper quarter of
The mid-upper quarter of
logical memory maps
to the lower byte of
sector 1. Address 200h
in logical memory
maps to address 100h
in physical memory
and all addresses
8-Kbit ALTUFM_I2C Megafunction
Logical Memory Contents
logical memory maps
to the upper byte of
sector 1. Address 300h
in logical memory
maps to address 100h
in physical memory
and all addresses
follow the order in
logical memory.
3FFh
Upper Quarter Addresses
300h to 3FFh
300h
2FFh
follow the order in
logical memory.
Mid-Upper Quarter Addresses
200h to 2FFh
100h
200h
1FFh
0FFh
The mid-lower quarter of
logical memory maps
to the lower byte of
sector 0. Address 100h
in logical memory
The lower quarter of
logical memory maps
to the lower byte of
sector 0. Address 000h
in logical memory
Mid-Lower Quarter Addresses
100h to 1FFh
100h
0FFh
maps to address 000h
in physical memory
and all addresses
follow the order in
logical memory.
maps to address 000h
in physical memory
and all addresses
follow the order in
logical memory.
Lower Quarter Addresses
000h to 0FFh
000h
000h
Upper 8-bit (byte)
Lower 8-bit (byte)
16-bit data in UFM
MAX V Device Handbook
January 2011 Altera Corporation
INTEL [ INTEL ]
