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5CSEMA6F31C8N 参数 Datasheet PDF下载

5CSEMA6F31C8N图片预览
型号: 5CSEMA6F31C8N
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 110000-Cell, CMOS, PBGA896, ROHS COMPLIANT, FBGA-896]
分类和应用: 可编程逻辑
文件页数/大小: 66 页 / 1360 K
品牌: INTEL [ INTEL ]
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Page 12  
Electrical Characteristics  
Table 14. Single-Ended I/O Standards for Cyclone V Devices (Part 2 of 2)  
VCCIO (V)  
VIL (V)  
Max  
VIH (V)  
VOL (V)  
Max  
VOH (V)  
(1)  
(1)  
I/O  
Standard  
IOL  
IOH  
(mA) (mA)  
Min Typ Max Min  
Min  
Max  
Min  
1.2 V  
1.14 1.2 1.26 –0.3 0.35 x VCCIO 0.65 x VCCIO VCCIO + 0.3 0.25 x VCCIO 0.75 x VCCIO  
2
–2  
Note to Table 14:  
(1) To meet the IOL and IOH specifications, you must set the current strength settings accordingly. For example, to meet the 3.3-V LVTTL specification  
(4 mA), you should set the current strength settings to 4 mA. Setting at lower current strength may not meet the IOL and IOH specifications in the  
handbook.  
Table 15. Single-Ended SSTL, HSTL, and HSUL I/O Reference Voltage Specifications for Cyclone V Devices  
VCCIO(V)  
Typ  
VREF(V)  
Typ  
VTT(V)  
Typ  
I/O  
Standard  
Min  
Max  
Min  
Max  
Min  
Max  
SSTL-2  
Class I, II  
2.375  
2.5  
1.8  
1.5  
2.625 0.49 x VCCIO 0.5 x VCCIO 0.51 x VCCIO  
1.89 0.833 0.9 0.969  
1.575 0.49 x VCCIO 0.5 x VCCIO 0.51 x VCCIO 0.49 x VCCIO  
VREF – 0.04  
VREF  
VREF  
VREF + 0.04  
SSTL-18  
Class I, II  
1.71  
V
REF – 0.04  
VREF + 0.04  
SSTL-15  
Class I, II  
1.425  
0.5 x VCCIO 0.51 x VCCIO  
0.5 x VCCIO 0.51 x VCCIO  
0.5 x VCCIO 0.51 x VCCIO  
SSTL-135  
Class I, II  
1.283 1.35 1.418 0.49 x VCCIO 0.5 x VCCIO 0.51 x VCCIO 0.49 x VCCIO  
SSTL-125  
Class I, II  
1.19  
1.71  
1.25  
1.8  
1.26 0.49 x VCCIO 0.5 x VCCIO 0.51 x VCCIO 0.49 x VCCIO  
HSTL-18  
Class I, II  
1.89  
0.85  
0.68  
0.9  
0.95  
0.9  
V
V
CCIO/2  
CCIO/2  
HSTL-15  
Class I, II  
1.425  
1.5  
1.575  
0.75  
HSTL-12  
Class I, II  
1.14  
1.14  
1.2  
1.2  
1.26 0.47 x VCCIO 0.5 x VCCIO 0.53 x VCCIO  
1.3 0.49 x VCCIO 0.5 x VCCIO 0.51 x VCCIO  
VCCIO/2  
HSUL-12  
Table 16. Single-Ended SSTL, HSTL, and HSUL I/O Standards Signal Specifications for Cyclone V Devices (Part 1 of 2)  
VIL(DC) (V)  
Max  
VIH(DC) (V)  
VIL(AC) (V)  
Max  
VIH(AC) (V)  
Min  
VOL (V)  
Max  
VOH (V)  
Min  
(1)  
(1)  
I/O  
Iol  
Ioh  
Standard  
(mA)  
(mA)  
–8.1  
–16.2  
–6.7  
–13.4  
–8  
Min  
Min  
Max  
SSTL-2  
Class I  
–0.3  
V
V
REF – 0.15 VREF + 0.15 VCCIO + 0.3 VREF – 0.31 VREF + 0.31 VTT – 0.608 VTT + 0.608  
8.1  
SSTL-2  
Class II  
–0.3  
–0.3  
–0.3  
REF – 0.15 VREF + 0.15 VCCIO + 0.3 VREF – 0.31 VREF + 0.31 VTT – 0.81  
VTT + 0.81  
16.2  
6.7  
SSTL-18  
Class I  
VREF  
V
REF + 0.125 VCCIO + 0.3 VREF – 0.25 VREF + 0.25 VTT – 0.603 VTT + 0.603  
0.125  
SSTL-18  
Class II  
VREF –  
0.125  
V
REF + 0.125 VCCIO + 0.3 VREF – 0.25 VREF + 0.25  
0.28  
VCCIO – 0.28 13.4  
SSTL-15  
Class I  
VREF  
V
REF – 0.1  
VREF + 0.1  
VREF + 0.1  
V
REF + 0.175 0.2 x VCCIO 0.8 x VCCIO  
REF + 0.175 0.2 x VCCIO 0.8 x VCCIO  
8
0.175  
SSTL-15  
Class II  
VREF  
VREF – 0.1  
V
16  
–16  
0.175  
Cyclone V Device Datasheet  
July 2014 Altera Corporation