CV-51002
2015.12.04
89
Document Revision History
Term
Definition
VOX
W
Output differential cross point voltage
High-speed I/O block—Clock boost factor
Document Revision History
Date
Version
Changes
December 2015
2015.12.04
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Updated Quad Serial Peripheral Interface (SPI) Flash Timing Requirements for Cyclone V Devices table.
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Updated Fclk, Tdutycycle, and Tdssfrst specifications.
Added Tqspi_clk, Tdin_start, and Tdin_end specifications.
Removed Tdinmax specifications.
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Updated the minimum specification for Tclk to 16.67 ns and removed the maximum specification in SPI
Master Timing Requirements for Cyclone V Devices table.
Updated Secure Digital (SD)/MultiMediaCard (MMC) Timing Requirements for Cyclone V Devices table.
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Updated T clk to Tsdmmc_clk_out symbol.
Updated Tsdmmc_clk_out and Td specifications.
Added Tsdmmc_clk, Tsu, and Th specifications.
Removed Tdinmax specifications.
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Updated the following diagrams:
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Quad SPI Flash Timing Diagram
SD/MMC Timing Diagram
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Updated configuration .rbf sizes for Cyclone V devices.
Changed instances of Quartus II to Quartus Prime.
Cyclone V Device Datasheet
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