AV-51002
2015.12.16
1-86
Programmable Output Buffer Delay
Programmable Output Buffer Delay
Table 1-77: Programmable Output Buffer Delay for Arria V Devices
This table lists the delay chain settings that control the rising and falling edge delays of the output buffer.
You can set the programmable output buffer delay in the Quartus Prime software by setting the Output Buffer Delay Control assignment to either
positive, negative, or both edges, with the specific values stated here (in ps) for the Output Buffer Delay assignment.
Symbol
Parameter
Typical
0 (default)
50
Unit
ps
ps
DOUTBUF
Rising and/or falling edge delay
100
ps
150
ps
Glossary
Table 1-78: Glossary
Term
Definition
Differential I/O standards
Receiver Input Waveforms
Arria V GX, GT, SX, and ST Device Datasheet
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