Figures
1
2
Clock Control States .................................................................................................11
Illustration of Deep Sleep State VCC Static and Ripple Tolerances
for the Celeron M Processor (Deep Sleep State): VID=1.260 V .......................................22
Illustration of Active State VCC Static and Ripple Tolerances
for the Celeron M Processor ULV: VID=0.940 V ............................................................24
Illustration of Deep Sleep State VCC Static and Ripple Tolerances
for the Celeron M Processor ULV: VID=0.940 V ............................................................25
Active VCC and ICC Loadline for the Celeron M Processor:
Standard Voltage and Ultra Low Voltage......................................................................25
Deep Sleep VCC and ICC Loadline for Celeron M Processors:
3
4
5
6
Standard Voltage and Ultra Low Voltage......................................................................26
Micro-FCPGA Package Top and Bottom Isometric Views .................................................29
Micro-FCPGA Package - Top and Side Views .................................................................30
Micro-FCPGA Package - Bottom View...........................................................................31
7
8
9
10 Micro-FCBGA Package Top and Bottom Isometric Views .................................................33
11 Micro-FCBGA Package Top and Side Views ...................................................................34
12 Micro-FCBGA Package Bottom View.............................................................................36
13 The Coordinates of the Processor Pins As Viewed from the Top of the Package..................38
Tables
1
Voltage Identification Definition..................................................................................16
2
3
4
5
6
7
8
9
FSB Pin Groups ........................................................................................................18
Processor DC Absolute Maximum Ratings.....................................................................19
Voltage and Current Specifications..............................................................................20
Voltage Tolerances for the Celeron M Processor (Deep Sleep State).................................22
Voltage Tolerances for the Celeron M Processor ULV (Active State)..................................23
Voltage Tolerances for the Celeron M Processor ULV (Deep Sleep State) ..........................24
FSB Differential BCLK Specifications............................................................................26
AGTL+ Signal Group DC Specifications ........................................................................27
10 CMOS Signal Group DC Specifications..........................................................................27
11 Open Drain Signal Group DC Specifications ..................................................................28
12 Micro-FCPGA Package Dimensions ..............................................................................32
13 Micro-FCPGA Package Dimensions ..............................................................................35
14 Pin Listing by Pin Name.............................................................................................39
15 Pin Listing by Pin Number..........................................................................................46
16 Signal Description.....................................................................................................55
17 Power Specifications for the Celeron M Processor..........................................................64
18 Thermal Diode Interface............................................................................................66
19 Thermal Diode Specification.......................................................................................66
4
Datasheet
INTEL [ INTEL ]
