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325119-001 参数 Datasheet PDF下载

325119-001图片预览
型号: 325119-001
PDF下载: 下载PDF文件 查看货源
内容描述: 英特尔® Xeon®处理器E7-8800 / 2800分之4800产品系列 [Intel® Xeon® Processor E7-8800/4800/2800 Product Families]
分类和应用:
文件页数/大小: 174 页 / 3951 K
品牌: INTEL [ INTEL ]
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Features  
Table 7-4.  
Memory Device SMBus Addressing  
Upper  
Address  
Device Select  
R/W  
1
Address  
(Hex)  
SKTID[1]  
Bit 2  
SKTID[0]  
Bit 1  
Bits 7-4  
SKTID[2]  
Bit 0  
A0h/A1h  
A2h/A3h  
A4h/A5h  
A6h/A7h  
10100  
10100  
10100  
10100  
10100  
10100  
10100  
10100  
0
0
1
1
0
1
0
1
X
X
X
X
Note:  
1. This addressing scheme will support up to 4 processors on a single SMBus.  
7.5  
Managing Data in the PIROM  
The PIROM consists of the following sections:  
• Header  
• Processor Data  
• Processor Core Data  
• Processor Uncore Data  
• Cache Data  
• Package Data  
• Part Number Data  
• Thermal Reference Data  
• Feature Data  
• Other Data  
Details on each of these sections are described below.  
Note:  
Reserved fields or bits SHOULD be programmed to zeros. However, OEMs should not  
rely on this model.  
7.5.1  
Header  
To maintain backward compatibility, the Header defines the starting address for each  
subsequent section of the PIROM. Software should check for the offset before reading  
data from a particular section of the ROM.  
Example: Code looking for the processor uncore data of a processor would read offset  
05h to find a value of 29. 29 is the first address within the 'Processor Uncore Data'  
section of the PIROM.  
7.5.1.1  
DFR: Data Format Revision  
This location identifies the data format revision of the PIROM data structure. Writes to  
this register have no effect.  
150  
Datasheet Volume 1 of 2