Thermal Specifications
What follows is a processor-specific PECI client definition, and is largely an addendum
to the PECI Network Layer and Design Recommendations sections for the PECI 2.0
Specification document.
Note:
Note that the PECI commands described in this document apply to the Intel Xeon
Processor E7-8800/4800/2800 Product Families processor only. Refer to Table 6-5 for a
list of PECI commands supported by the Intel Xeon Processor E7-8800/4800/2800
Product Families processor PECI client.
Table 6-5.
Summary of Processor-specific PECI Commands
Supported on
Command
Intel Xeon Processor E7-8800/4800/2800 Product Families
processor CPU
Ping()
Yes
Yes
Yes
Yes
Yes
Yes
Yes
GetDIB()
GetTemp()
PCIConfigRd()
PCIConfigWr()
1
MbxSend()
1
MbxGet()
Note:
1.
Refer to Table 6-9 for a summary of mailbox commands supported by the Intel Xeon Processor E7-8800/
4800/2800 Product Families processor CPU.
6.3.1
PECI Client Capabilities
The Intel Xeon Processor E7-8800/4800/2800 Product Families processor PECI client is
designed to support the following sideband functions:
• Processor and DRAM thermal management
• Platform manageability functions, including thermal, power and electrical error
monitoring
• Processor interface tuning and diagnostics capabilities (Intel® Interconnect BIST
[Intel® IBIST]).
6.3.1.1
Thermal Management
Processor fan speed control is managed by comparing PECI thermal readings against
the processor-specific fan speed control reference point, or TCONTROL. Both TCONTROL
and PECI thermal readings are accessible via the processor PECI client. These variables
are referenced to a common temperature, the TCC activation point, and are both
defined as negative offsets from that reference. Algorithms for fan speed management
using PECI thermal readings and the TCONTROL reference are documented in
Section 6.3.2.6.
PECI-based access to DRAM thermal readings and throttling control coefficients provide
a means for Board Management Controllers (BMCs) or other platform management
devices to feed hints into on-die memory controller throttling algorithms. These control
coefficients are accessible using PCI configuration space writes via PECI. The PECI-
based configuration write functionality is defined in Section 6.3.2.5.
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