Electrical Specifications
2.11
Processor DC Specifications
The processor DC specifications in this section are defined at the processor core silicon and
not at the package pins unless noted otherwise. See Chapter 4 for the pin signal definitions and
signal pin assignments. Most of the signals on the processor FSB are in the GTL+ signal group. The
DC specifications for these signals are listed in Table 2-10.
Previously, legacy signals and Test Access Port (TAP) signals to the processor used low-voltage
CMOS buffer types. However, these interfaces now follow DC specifications similar to GTL+. The
DC specifications for these signal groups are listed in Table 2-11 and Table 2-12.
Table 2-8 through Table 2-15 list the DC specifications for the Celeron D processor and are valid
only while meeting specifications for case temperature, clock frequency, and input voltages. Care
should be taken to read all notes associated with each parameter.
Table 2-8. Voltage and Current Specifications
Symbol
Parameter
Min
Typ
Max
Unit
Notes
1
VID range
VID
1.250
—
1.400
V
See Table 2-9 and VID – I (max)
2,3,4
CC
V
V
V
CC
CC
Figure 2-2
* 1.45 mΩ
Processor
Number
Core Frequency
for processor with
I
CC
multiple VID:
350
345
340
335
330
325
320
3.20 GHz
73
73
73
73
73
73
73
3.06 GHz
2.93 GHz
2.80 GHz
2.66 GHz
2.53 GHz
2.40 GHz
I
CC
5
—
—
A
I
Stop-Grant
3.20 GHz
3.06 GHz
2.93 GHz
2.80 GHz
2.66 GHz
2.53 GHz
2.40 GHz
CC
350
345
340
335
330
325
320
40
40
40
40
40
40
40
I
I
SGNT
6,7
—
—
A
SLP
8
9
9
I
I
I
I
I
I
I
I
I
TCC active
for PLL pins
—
—
—
—
—
—
—
—
I
CC
A
TCC
CC
CC
CC
CC
60
60
mA
mA
µA
CC_VCCA
CC_VCCIOPLL
CC_GTLREF
for I/O PLL pin
for GTLREF pins (all pins)
200
/
9
CC_VCCVID
I
for VCCVID/VCCVIDLB
—
—
150
mA
CC
VCCVIDLB
NOTES:
1. Individual processor VID values may be calibrated during manufacturing such that two devices at the same
speed may have different VID settings.
2.
These voltages are targets only. A variable voltage source should exist on systems in the event that a differ-
ent voltage is required. See Section 2.4 and Table 2-2 for more information.
Datasheet
23