Electrical Characteristics
Figure 8-21. Sleep control signal relationship - Host boots and Intel Management Engine
off
t234
SLP_S3#
S4_STATE#
t297
SLP_S4#
SLP_S5#
t302
SLP_M#
NOTES:
1.
t290 is also applicable when the system transitions from S0 to G3.
Figure 8-22. Sleep control signal relationship - Host and Intel Management Engine boot
after G3
t234
SLP_S3#
t297
S4_STATE #
SLP_S4#
SLP_S5#
SLP_M #
NOTE: When both the host and Intel Management Engine boot after G3, SLP_M# does not have
any timing dependency on other sleep control signals. SLP_M# will be de-asserted some
time between SLP_S5# de-assertion and SLP_S3# de-assertion.
290
Datasheet