Intel® HD Audio (D27:F0)
10.2.13 CAP_PTR—Capabilities Pointer Register
Address Offset:
Default Value:
34h
50h
Attribute:
Size:
RO
8 bits
This register indicates the offset for the capability pointer.
Default
Bit
and
Description
Access
50h
RO
Pointer (PTR): This field indicates that the first capability pointer offset
is offset 50h (Power Management Capability).
7:0
10.2.14 INTLN—Interrupt Line Register
Address Offset:
Default Value:
3Ch
00h
Attribute:
Size:
R/W
8 bits
Default
Bit
and
Description
Access
Interrupt Line: This data is not used by the Intel® SCH. It is used to
communicate to software the interrupt line that the interrupt pin is
connected to.
00h
R/W
7:0
10.2.15 INTPN—Interrupt Pin Register
Address Offset:
Default Value:
3Dh
See Description
Attribute:
Size:
RO
8 bits
Default
Bit
and
Description
Access
0h
RO
7:4
3:0
Reserved
0h
RO
Interrupt Pin: This reflects the value of D27IP.ZIP (Chipset Config
Registers:Offset 3110h:Bits 3:0).
10.2.16 HDCTL—HD Control Register
Address Offset:
Default Value:
40h
00h
Attribute:
Size:
R/W, RO
8 bits
Default
Bit
7:1
0
and
Access
Description
00h
RO
Reserved
Low Voltage Mode Enable (LMVE)
0
R/W
0 = (Default) The Intel HD Audio controller operates in high voltage mode.
1 = The Intel HD Audio controller's AFE operates in low voltage mode.
128
Datasheet
INTEL [ INTEL ]
