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317607-001 参数 Datasheet PDF下载

317607-001图片预览
型号: 317607-001
PDF下载: 下载PDF文件 查看货源
内容描述: Express芯片组 [Express Chipset]
分类和应用:
文件页数/大小: 351 页 / 2481 K
品牌: INTEL [ INTEL ]
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Electrical Characteristics  
11.2  
Signal Groups  
The signal description includes the type of buffer used for the particular signal.  
PCI Express*  
/ Intel® sDVO  
PCI Express interface signals. These signals are compatible with PCI Express  
1.1 Signaling Environment AC Specifications and are AC coupled. The buffers  
are not 3.3 V tolerant. Differential voltage spec = (|D+ - D-|) * 2 =  
1.2 Vmax. Single-ended maximum = 1.25 V. Single-ended minimum = 0 V.  
DMI  
Direct Media Interface signals. These signals are compatible with PCI  
Express 1.0 Signaling Environment AC Specifications, but are DC coupled.  
The buffers are not 3.3 V tolerant. Differential voltage spec = (|D+ - D-|) *  
2 = 1.2 Vmax. Single-ended maximum = 1.25 V. Single-ended minimum =  
0 V.  
GTL+  
HCSL  
Open Drain GTL+ interface signal. Refer to the GTL+ I/O Specification for  
complete details.  
Host Clock Signal Level buffers. Current mode differential pair. Differential  
typical swing = (|D+ – D-|) * 2 = 1.4 V. Single ended input tolerant from -  
0.35V to 1.2V. Typical crossing voltage 0.35 V.  
SSTL-1.8  
SSTL-1.5  
Stub Series Termination Logic. These are 1.8 V output capable buffers. 1.8 V  
tolerant.  
Stub Series Termination Logic. These are 1.5 V output capable buffers. 1.5 V  
tolerant.  
CMOS  
CMOS buffers  
Analog  
Analog reference or output. May be used as a threshold voltage or for buffer  
compensation.  
Datasheet  
313  
 
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