Electrical Characteristics
11.2
Signal Groups
The signal description includes the type of buffer used for the particular signal.
PCI Express*
/ Intel® sDVO
PCI Express interface signals. These signals are compatible with PCI Express
1.1 Signaling Environment AC Specifications and are AC coupled. The buffers
are not 3.3 V tolerant. Differential voltage spec = (|D+ - D-|) * 2 =
1.2 Vmax. Single-ended maximum = 1.25 V. Single-ended minimum = 0 V.
DMI
Direct Media Interface signals. These signals are compatible with PCI
Express 1.0 Signaling Environment AC Specifications, but are DC coupled.
The buffers are not 3.3 V tolerant. Differential voltage spec = (|D+ - D-|) *
2 = 1.2 Vmax. Single-ended maximum = 1.25 V. Single-ended minimum =
0 V.
GTL+
HCSL
Open Drain GTL+ interface signal. Refer to the GTL+ I/O Specification for
complete details.
Host Clock Signal Level buffers. Current mode differential pair. Differential
typical swing = (|D+ – D-|) * 2 = 1.4 V. Single ended input tolerant from -
0.35V to 1.2V. Typical crossing voltage 0.35 V.
SSTL-1.8
SSTL-1.5
Stub Series Termination Logic. These are 1.8 V output capable buffers. 1.8 V
tolerant.
Stub Series Termination Logic. These are 1.5 V output capable buffers. 1.5 V
tolerant.
CMOS
CMOS buffers
Analog
Analog reference or output. May be used as a threshold voltage or for buffer
compensation.
Datasheet
313