Land Listing and Signal Descriptions
Table 25.
Signal Description (Sheet 1 of 9)
Name
Type
Description
RSP# (Response Parity) is driven by the response agent (the agent
responsible for completion of the current transaction) during
assertion of RS[2:0]#, the signals for which RSP# provides parity
protection. It must connect to the appropriate pins/lands of all
processor FSB agents.
RSP#
Input
A correct parity signal is high if an even number of covered signals
are low and low if an odd number of covered signals are low. While
RS[2:0]# = 000, RSP# is also high, since this indicates it is not
being driven by any agent ensuring correct parity.
SKTOCC# (Socket Occupied) will be pulled to ground by the
SKTOCC#
SMI#
Output processor. System board designers may use this signal to determine
if the processor is present.
SMI# (System Management Interrupt) is asserted asynchronously
by system logic. On accepting a System Management Interrupt, the
processor saves the current state and enter System Management
Mode (SMM). An SMI Acknowledge transaction is issued, and the
processor begins program execution from the SMM handler.
Input
If SMI# is asserted during the de-assertion of RESET#, the
processor will tri-state its outputs.
STPCLK# (Stop Clock), when asserted, causes the processor to
enter a low power Stop-Grant state. The processor issues a Stop-
Grant Acknowledge transaction, and stops providing internal clock
signals to all processor core units except the FSB and APIC units.
STPCLK#
Input The processor continues to snoop bus transactions and service
interrupts while in Stop-Grant state. When STPCLK# is de-asserted,
the processor restarts its internal clock to all units and resumes
execution. The assertion of STPCLK# has no effect on the bus clock;
STPCLK# is an asynchronous input.
TCK (Test Clock) provides the clock input for the processor Test Bus
(also known as the Test Access Port).
TCK
TDI
Input
TDI (Test Data In) transfers serial test data into the processor. TDI
Input
provides the serial input needed for JTAG specification support.
TDO (Test Data Out) transfers serial test data out of the processor.
Output TDO provides the serial output needed for JTAG specification
support.
TDO
TESTHI[13:0] must be connected to the processor’s appropriate
power source (refer to VTT_OUT_LEFT and VTT_OUT_RIGHT signal
description) through a resistor for proper processor operation. See
TESTHI[13:0]
Input
Section 2.4 for more details.
THERMDA
THERMDC
Other Thermal Diode Anode. See Section 5.2.6.
Other Thermal Diode Cathode. See Section 5.2.6.
Datasheet
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