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298596-004 参数 Datasheet PDF下载

298596-004图片预览
型号: 298596-004
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内容描述: 英特尔赛扬处理器的PGA370插槽高达1.40 GHz的0.13微米工艺 [Intel Celeron Processor for the PGA370 Socket up to 1.40 GHz on 0.13 Micron Process]
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文件页数/大小: 82 页 / 1417 K
品牌: INTEL [ INTEL ]
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Intel® Celeron® Processor for PGA370 up to 1.40 GHz on 0.13 µ Process  
3.3.1  
Overshoot/Undershoot Guidelines  
Overshoot (or undershoot) is the absolute value of the maximum voltage above the nominal high  
voltage or below VSS. The overshoot guideline limits transitions beyond VCC or VSS due to the fast  
signal edge rates (see Figure 21 for non-AGTL signals). The processor can be damaged by repeated  
overshoot events on 1.25 V or 1.8 V tolerant buffers if the charge is large enough (i.e., if the  
overshoot is great enough). Permanent damage to the processor is the likely result of excessive  
overshoot/undershoot. Violating the overshoot/undershoot guideline will also make satisfying the  
ringback specification difficult. The overshoot/undershoot guideline is 0.3 V and assumes the  
absence of diodes on the input. These guidelines should be verified in simulations without the on-  
chip ESD protection diodes present because the diodes will begin clamping the 1.25 V and 2.5 V  
tolerant signals beginning at approximately 0.7 V above the appropriate supply and 0.7 V below  
VSS. If signals are not reaching the clamping voltage, this will not be an issue. A system should not  
rely on the diodes for overshoot/undershoot protection as this will negatively affect the life of the  
components and make meeting the ringback specification very difficult.  
Table 28. 33 MHz CMOS Signal Group Overshoot/Undershoot Tolerance  
Maximum Pulse Duration at  
Tcase = 69 °C (ns)  
Maximum Pulse Duration at  
Tcase = 71 °C (ns)  
Maximum Pulse Duration at  
Tcase = 72 °C (ns)  
Overshoot/  
Undershoot  
Magnitude  
(V)  
AF =  
0.01  
AF =  
0.1  
AF =  
1
AF =  
0.01  
AF =  
0.1  
AF =  
1
AF =  
0.01  
AF =  
0.1  
AF =  
1
2.38  
2.33  
2.28  
2.23  
2.18  
2.13  
2.08  
35  
60  
60  
60  
60  
60  
60  
3.5  
8.0  
18  
41  
60  
60  
60  
0.35  
0.8  
1.8  
4.1  
9.0  
21  
19  
40  
60  
60  
60  
60  
60  
1.9  
4.0  
8.0  
18  
0.19  
0.40  
0.80  
1.80  
3.75  
8.00  
16.00  
17  
36  
60  
60  
60  
60  
60  
1.7  
3.6  
7.7  
16  
0.17  
0.36  
0.77  
1.60  
3.42  
7.12  
14.5  
37.5  
60  
34  
60  
60  
60  
60  
Note: The undershoot guideline limits transitions exactly as described for the ATGL signals. See  
Figure 20.  
3.3.2  
Ringback Specification  
Ringback refers to the amount of reflection seen after a signal has switched. The ringback  
specification is the voltage that the signal rings back to after achieving its maximum absolute  
value. See Figure 21 for an illustration of ringback. Excessive ringback can cause false signal  
detection or extend the propagation delay. The ringback specification applies to the input pin of  
each receiving agent. Violations of the signal ringback specification are not allowed under any  
circumstances for non-AGTL signals.  
Ringback can be simulated with or without the input protection diodes that can be added to the  
input buffer model. However, signals that reach the clamping voltage should be evaluated further.  
See Table 29 for the signal ringback specifications for non-AGTL signals for simulations at the  
processor pins.  
48  
Datasheet