A10-DATASHEET
2015.12.31
31
Transceiver Specifications for Arria 10 GX, SX, and GT Devices
Transceiver Speed Grades 1, 2, 3, 4, and 5
Symbol/Description
Condition
Unit
Min
Typ
Max
Reconfiguration
interface
reconfig_clk
100
—
125
MHz
Table 32: Transceiver Clock Network Maximum Data Rate Specifications
Maximum Performance
Clock Network
Channel Span
Unit
ATX (39)
17.4
fPLL
12.5
12.5
12.5
10.5
CMU
10.3125
N/A
x1
6 channels
6 channels
Side-wide
Gbps
Gbps
Gbps
Gbps
x6
17.4
x6 PLL feedback
xN at 0.95 V
17.4
N/A
10.5
N/A
Up two banks and
down two banks
xN at 1.03 V
xN at 1.12 V
15.0
16.0
12.5
12.5
N/A
N/A
Up two banks and
down two banks
Gbps
Gbps
Up two banks and
down two banks
Table 33: Receiver Specifications—Preliminary
Transceiver Speed Grades 1, 2, 3, 4, and 5
Typ
Symbol/Description
Condition
Unit
Min
Max
Supported I/O
Standards
—
—
High Speed Differential I/O, CML, Differential LVPECL, and LVDS
1.2 V
Absolute VMAX for
a receiver pin (40)
—
—
(39)
ATX maximum data rate support per speed grade.
Arria 10 Device Datasheet
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