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10AS066K4F40E3SG 参数 Datasheet PDF下载

10AS066K4F40E3SG图片预览
型号: 10AS066K4F40E3SG
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 660000-Cell, CMOS, PBGA1517, 40 X 40 MM, ROHS COMPLIANT, FBGA-1517]
分类和应用: 可编程逻辑
文件页数/大小: 110 页 / 1391 K
品牌: INTEL [ INTEL ]
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A10-DATASHEET  
2015.12.31  
88  
Configuration Files  
Configuration Files  
There are two types of configuration bit stream formats for different configuration schemes:  
PS and FPP—Raw Binary File (.rbf)  
AS—Raw Programming Data File (.rpd)  
The .rpd file size follows the Altera configuration devices capacity. However, the actual configuration bit stream size for .rpd file is the same as .rbf  
file.  
Table 82: Configuration Bit Stream Sizes for Arria 10 Devices—Preliminary  
Use this table to estimate the file size before design compilation. Different configuration file formats, such as a hexadecimal file (.hex) or tabular text file  
(.ttf) format, have different file sizes.  
For the different types of configuration file and file sizes, refer to the Quartus Prime software. However, for a specific version of the Quartus Prime  
software, any design targeted for the same device has the same uncompressed configuration file size.  
Variant  
Product Line  
Uncompressed Configuration  
Bit Stream Size (bits)  
IOCSR .rbf Size (bits)  
Recommended EPCQ-L Serial Configuration  
Device  
GX 016  
GX 022  
GX 027  
GX 032  
GX 048  
GX 057  
GX 066  
GX 900  
GX 1150  
81,923,582  
81,923,582  
122,591,622  
122,591,622  
177,341,246  
252,831,072  
252,831,072  
351,292,512  
351,292,512  
1,356,716  
1,356,716  
1,360,284  
1,360,284  
1,454,656  
1,549,028  
1,549,028  
1,885,396  
1,885,396  
EPCQ-L256 or higher density  
EPCQ-L256 or higher density  
EPCQ-L256 or higher density  
EPCQ-L256 or higher density  
EPCQ-L256 or higher density  
EPCQ-L256 or higher density  
EPCQ-L256 or higher density  
EPCQ-L512 or higher density  
EPCQ-L512 or higher density  
Arria 10 GX  
(106)  
(107)  
To enable CLKUSRas the initialization clock source, turn on the Enable user-supplied start-up clock (CLKUSR) option in the Quartus Prime  
software from the General panel of the Device and Pin Options dialog box.  
If you use the CLKUSRpin for AS and transceiver calibration simultaneously, the only allowed frequency is 100 MHz.  
Arria 10 Device Datasheet  
Send Feedback  
Altera Corporation  
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