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TN80C186XL25 参数 Datasheet PDF下载

TN80C186XL25图片预览
型号: TN80C186XL25
PDF下载: 下载PDF文件 查看货源
内容描述: 16位微控制器 [16-Bit Microcontroller]
分类和应用: 微控制器外围集成电路装置动态存储器时钟
文件页数/大小: 75 页 / 1318 K
品牌: INNOVASIC [ INNOVASIC, INC ]
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IA186XL/IA188XL  
16-Bit Microcontrollers  
Data Sheet  
July 6, 2011  
Table 7. IA186XL Pin/Signal Descriptions (Continued)  
Pin  
Signal  
dt/r_n  
Name  
dt/r_n  
PLCC  
40  
PQFP  
37  
LQFP  
54  
Description  
data transmit/receive. Output. This signal is  
used to control the direction of data flow for  
bidirectional buffers in a buffered system.  
When dt/r_n is high, the direction indicated is  
transmit; when dt/r_n is low, the direction  
indicated is receive.  
error_n  
hlda  
mcs1_n/error_n 37  
40  
25  
58  
42  
error. Input. Active Low. When this signal is  
asserted (low), it indicates that the last  
numerics coprocessor operation resulted in an  
exception condition.  
hold acknowledge. Output. Active High.  
When hlda is asserted (high), it indicates that  
the IA186XL has relinquished control of the  
local bus to another bus master in response to  
a HOLD request (see next table entry).  
hlda  
51  
When hlda is asserted, the IA186XL data bus  
and control signals are floated allowing  
another bus master to drive the signals  
directly.  
hold  
hold  
50  
26  
43  
hold. Input. Active High. This signal is a  
request indicating that an external bus master  
wishes to gain control of the local bus. The  
IA186XL will relinquish control of the local bus  
between instruction boundaries not  
conditioned by a LOCK prefix.  
int0  
int1  
int2  
int3  
int0  
int1  
int2/inta0_n  
int3/inta1_n  
45  
44  
42  
41  
31  
32  
35  
36  
48  
49  
52  
53  
interrupt N (N = 03). Input. Active High.  
These maskable inputs interrupt program flow  
and cause execution to continue at an  
interrupt vector of a specific interrupt type as  
follows:  
int0: Type 12  
int1: Type 13  
int2: Type 14  
int3: Type 15  
To allow interrupt expansion, int0 and int1  
can be used with the interrupt acknowledge  
signals inta0_n and inta1_n (see next table  
entries).  
inta 0_n  
inta 1_n  
int2/inta0_n  
int3/inta1_n  
42  
41  
35  
36  
52  
53  
interrupt acknowledge. Output. Active low.  
When used with external interrupt controllers.  
®
IA211080711-09  
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