IA82527
Data Sheet
CAN Serial Communications Controller
December 20, 2012
Table 3. Pin/Signal Descriptions (Continued)
Pin
Signal
wrh_n
Name
PLCC PQFP
Description
wrh_n/p2.7
10
4
write high byte. Input. Active Low. Mode 1. When
wrh_n is asserted (low), it signals a write cycle for the
high byte of data (bits 15–8).
wrl_n
xtal1
wr_n/wrl_n/r-w_n
xtal1
7
1
write low byte. Input. Active Low. Mode 1. When
wrl_n is asserted (low), it signals a write cycle for the
low byte of data (bits 7–0).
18
12
Crystal (xtal) 1. Input. The xtal1 pin is the input
connection for an external crystal that drives the
IA82527 internal oscillator. (When an external crystal
is used, it is connected between this pin and the xtal2
pin—see next table entry.)
If an external oscillator or clock source is used to drive
the IA82527 instead of a crystal, the xtal1 pin is the
input for this clock source.
xtal2
xtal2
19
13
Crystal (xtal) 2. Output (push-pull). The xtal2 pin is
the output connection for an external crystal that drives
the IA82527 internal oscillator. (When an external
crystal is used, it is connected between this pin and
the xtal1 pin—see previous table entry.)
If an external oscillator or clock source is used to drive
the IA82527 instead of a crystal, xtal2 must be left
unconnected (i.e., must be floated). Additionally, the
xtal2 output must not be used as a clock source for
other system components.
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