Page 8 of 32
IA80C152
Preliminary Data Sheet
UNIVERSAL COMMUNICATIONS CONTROLLER
Table 4 - SFR Summary
Register
Name
A
Register
Address
0E0h
095h
Functional
Block
C8051
GSC
Initial
Value
Item
1.
2.
3.
4.
5.
6.
7.
8.
Description
Accumulator
00h
00h
00h
00h
00h
00h
00h
00h
00h
X
X
X
X
X
X
X
X
X
ADR0
ADR1
ADR2
ADR3
AMSK0
AMSK1
B
BAUD
BCRL0
BCRH0
BCRL1
BCRH1
BKOFF
DARL0
DARH0
DARL1
DARH1
DCON0
DCON1
DPH
DPL
GMOD
IE
IEN1
IFS
IP
IPN1
MYSLOT
P0
P1
P2
P3
P4
P5
P6
PCON
PRBS
PSW
RFIFO
RSTAT
SARL0
SARH0
SARL1
SARH1
SBUF
SCON
SLOTTM
SP
Address Match 0
Address Match 1
Address Match 2
Address Match 3
Address Mask 0
Address Mask 1
0A5h
0B5h
0C5h
0D5h
0E5h
0F0h
094h
0E2h
0E3h
0F2h
0F3h
0C4h
0C2h
0C3h
0D2h
0D3h
092h
GSC
GSC
GSC
GSC
GSC
C8051
GSC
DMA
DMA
DMA
DMA
GSC
DMA
DMA
DMA
DMA
DMA
DMA
C8051
C8051
GSC
B Register
Baud Rate
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
25.
26.
27.
28.
29.
30.
31.
32.
33.
34.
35.
36.
37.
38.
39.
40.
41.
42.
43.
44.
45.
46.
47.
48.
49.
50.
51.
Byte Count Register (Low) 0
Byte Count Register (High) 0
Byte Count Register (Low) 1
Byte Count Register (High) 1
Backoff Timer
Destination Address Register (Low) 0
Destination Address Register (High) 0
Destination Address Register (Low) 1
Destination Address Register (High) 1
DMA Control 0
00h
00h
00h
00h
093h
083h
082h
084h
DMA Control 1
Data Pointer High
Data Pointer Low
GSC Mode
X0000000b
0XX00000b
XX000000b
0A8h
C8051
Interrupt Enable
0C8h DMA, GSC Interrupt Enable 1
0A4h
0B8h
GSC
C8051
Interframe Space
Interrupt Priority
00h
XXX00000b
XX000000b
0F8h DMA, GSC Interrupt Priority 1
0F5h
080h
090h
0A0h
0B0h
0C0h
091h
0A1h
087h
0E4h
0D0h
0F4h
0E8h
0A2h
0A3h
0B2h
0B3h
099h
098h
0B4h
081h
0D4h
088h
GSC
C8051
C8051
C8051
C8051
C8051
C8051
C8051
C8051
GSC
C8051
GSC
GSC
DMA
DMA
DMA
DMA
C8051
C8051
GSC
GSC Slot Address
Port 0
00h
0FFh
0FFh
0FFh
0FFh
0FFh
0FFh
0FFh
Port 1
Port 2
Port 3
Port 4
Port 5
Port 6
Power Control
0XXX0000b
Pseudo-Random Sequence
Program Status Word
Receive FIFO
00h
00h
X
00h
X
X
X
X
X
00h
00h
07h
X
Receive Status
Source Address Register (Low) 0
Source Address Register (High) 0
Source Address Register (Low) 1
Source Address Register (High) 1
Serial Channel Buffer (UART)
Serial Channel Control (UART)
GSC Slot Time
C8051
GSC
C8051
Stack Pointer
TCDCNT
TCON
Transmit Collision Counter
Timer Control
00h
Copyright ã 2000
innovASIC
[_________The End of Obsolescenceä
INNOVASIC [ INNOVASIC, INC ]
