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IA80C152
Preliminary Data Sheet
UNIVERSAL COMMUNICATIONS CONTROLLER
FFFFH
C000H
8000H
FFH
Upper 128
Bytes
SFR Space
80H
7FH
4000H
0000H
Lower 128
Bytes
00H
Internal RAM
External RAM
Figure 5 - Memory Space
Table 3 - Summary of Program Memory Fetches
Fetch Control
Fetch Signal
PSEN EPSEN
Version
JA, JC
Fetch Ports
Memory Space
0h - FFFFh
EBEN
EA
N/A
0 or 1 P0, P2
Active
-
JB, JD
0
1
1
0
0
1
P0, P2
P5, P6
P5, P6
P0, P2
Active
-
Active
Active
-
0h - FFFFh
0h - FFFFh
0h - 1FFFh
2000h - FFFFh
-
-
Active
Summary of the 80C152 Registers and Interrupts
The 80C152 combines the register set of the 8051BH and additional SFRs for the DMA and GSC
functions. Likewise, the 80C152 combines the interrupts of the 8051BH and the interrupts
required by the DMA and GSC. Table 4 contains a summary of the 80C152 registers, and table 5
contains a summary of the 80C152 interrupts.
Copyright ã 2000
innovASIC
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