IA8044/IA8344
SDLC COMMUNICATIONS CONTROLLER
Preliminary Data Sheet
As of Production Version 00
Instruction Set
The 8X44 architecture and instruction set are identical to the 8051’s. The following tables give a
survey of the instruction set of the IA8044/IA8344 Microcontroller core.
Arithmetic Operations
Cycle
Mnemonic
Description
Byte
ADD A,Rn
ADD A, direct
ADD A,@Ri
ADD A,#data
ADDC A,Rn
ADDC A,direct
ADDC A,@Ri
ADDC A,#data
SUBB A,Rn
SUBB A,direct
SUBB A,@Ri
SUBB A,#data
INC A
INC Rn
INC direct
INC @ Ri
DEC A
DEC Rn
DEC direct
DEC @Ri
INC DPTR
MUL A,B
DIV A,B
DA A
Add register to accumulator
Add direct byte to accumulator
Add indirect RAM to accumulator
Add immediate data to accumulator
Add register to accumulator with carry flag
Add direct byte to A with carry flag
Add indirect RAM to A with carry flag
Add immediate data to A with carry flag
Subtract register from A with borrow
Subtract direct byte from A with borrow
Subtract indirect RAM from A with borrow
Subtract immediate data from A with borrow
Increment accumulator
Increment register
Increment direct byte
Increment indirect RAM
Decrement accumulator
Decrement register
Decrement direct byte
Decrement indirect RAM
Increment data pointer
1
2
1
2
1
2
1
2
1
2
1
2
1
1
2
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
4
4
1
Multiply A and B
Divide A by B
Decimal adjust accumulator
Copyright
innovASIC
2001
ENG210010112-00
www.innovasic.com
Customer Support:
1-888-824-4184
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