IA6805E2
29 August 2007
Microprocessor Unit
As of Production Version 00
TIMER
COUNTER=$00
tTL
tTH
tTLTL
INT_EXT_CLK
TCR7
tIVASH
AS
n0
n1
n2
n3
n4
n5
n6
n7
DS
OP CODE ADDR
A[12:8]
ADDRESS + 1
1F (FF) 1F (FF)
INT ROUTINE
STARTING
ADDRESS
OP CODE
ADDRESS
ADDR + 1
SP-1
SP-2
SP-3
SP-4
SP
NEW PCH
NEW PCL
B[7:0]
8F
PCL
PCH
X
A
CC F6
F7
WAIT OP CODE
1ST OP CODE
INT ROUTINE
RW_N
Figure 17. Timer Interrupt After WAIT Instruction Timing
TIMER
COUNTER=$00
tTL
tTH
tTLTL
INT_EXT_CLK
TCRB7
tIVASH
AS
n0
n1
n2
n3
n4
n5
n6
n7
DS
OP CODE ADDR
A[12:8]
ADDRESS + 1
1F (FF) 1F (FF)
INT ROUTINE
STARTING
ADDRESS
OP CODE
ADDRESS
ADDR + 1
SP-1
SP-2
SP-3
SP-4
SP
NEW PCH
NEW PCL
B[7:0]
8E
PCL
PCH
X
A
CC F6
F7
STOP OP CODE
1ST OP CODE
INT ROUTINE
RW_N
Figure 18. Interrupt Recovery From STOP Instruction Timing
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