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IA6805E2-PDW40I-00 参数 Datasheet PDF下载

IA6805E2-PDW40I-00图片预览
型号: IA6805E2-PDW40I-00
PDF下载: 下载PDF文件 查看货源
内容描述: 微处理器单元 [Microprocessor Unit]
分类和应用: 外围集成电路微处理器光电二极管时钟
文件页数/大小: 33 页 / 344 K
品牌: INNOVASIC [ INNOVASIC, INC ]
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IA6805E2  
29 August 2007  
Microprocessor Unit  
As of Production Version 00  
TCR (Timer Control Register ($0009)):  
An 8-bit register that controls functions such as configuring operation mode, setting ratio of  
the prescaler, and generating timer interrupt request signals. All bits except bit 3 are  
read/write. Bits TCR5 - TCR0 are unaffected by reset_n.  
7
6
5
4
3
2
1
0
TCR7 TCR6 TCR5 TCR4 TCR3 TCR2 TCR1 TCR0  
Reset:  
0
1
0
0
0
0
0
0
TCR7 – Timer Interrupt Request  
Used to indicate the timer interrupt when it is logic one.  
1 – Set when the counter decrements to zero or under program control.  
0 – Cleared on external reset, POR, STOP instruction, or program control.  
TCR6 – Timer Interrupt Mask  
Used to inhibit the timer interrupt.  
1 – Interrupt inhibited. Set on external reset, POR, STOP instruction, or program  
control.  
0 – Interrupt enabled.  
TCR5 – External or Internal  
Selects input clock source. Unaffected by reset.  
1 – External clock selected.  
0 – Internal clock selected (AS) (fOSC/5).  
TCR4 – Timer External Enable  
Used to enable external timer pin or to enable the internal clock. Unaffected by reset.  
1 – Enables external timer pin.  
0 – Disables external timer pin.  
Copyright © 2007  
IA211081401-03  
www.Innovasic.com  
Customer Support:  
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