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EN80C186XL12 参数 Datasheet PDF下载

EN80C186XL12图片预览
型号: EN80C186XL12
PDF下载: 下载PDF文件 查看货源
内容描述: 16位微控制器 [16-Bit Microcontroller]
分类和应用: 微控制器
文件页数/大小: 75 页 / 1318 K
品牌: INNOVASIC [ INNOVASIC, INC ]
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IA186XL/IA188XL  
16-Bit Microcontrollers  
Data Sheet  
July 6, 2011  
Errata  
No.  
Problem  
Ver. 0  
Ver. 1  
Ver. 2  
MOVS/POP/PUSH instructions interrupted by  
DMA can corrupt data.  
MOVS/POP/PUSH instructions interrupted by  
DMA can corrupt data.  
Exists  
Exists  
Fixed  
11  
12  
Exists  
Exists  
Fixed  
8.2  
Detail  
Errata No. 1  
Problem: Pin LOCK_n does not have an internal pullup.  
Description: Because Pin LOCK_n does not have an internal pullup, it will float during reset  
and bus hold.  
Workaround: An external pullup may be necessary if there is high external load on the signal.  
Errata No. 2  
Problem:  
When the timer compare register for any of the timers is set to x0000, the max count is xFFFF  
instead of x10000 as in the OEM part.  
Description: The timer output will change one count earlier than it should when the max count  
is set to x0000.  
Workaround: The workaround is application dependent. Please contact Innovasic Technical  
Support if this erratum is an issue.  
Errata No. 3  
Problem:  
When using external interrupts IRQ0 or IRQ1 in Cascade Mode, the acknowledge signal on  
INTA0 or INTA1 may be lost or truncated.  
Description: The acknowledge for IRQ0 or IRQ1 will be lost or truncated in Cascade Mode if  
another interrupt, with a higher priority setting (as configured in the interrupt control registers),  
occurs just before or during the acknowledge. This does not apply to interrupts generated by the  
DMA. This also does not apply when using the inherent priority settings (all interrupts  
configured with the same priority).  
®
IA211080711-09  
UNCONTROLLED WHEN PRINTED OR COPIED  
http://www.Innovasic.com  
Customer Support:  
Page 70 of 75  
1-888-824-4184  
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