IA186ES/IA188ES
Data Sheet
8-Bit/16-Bit Microcontrollers
November 15, 2011
Table 32. MCS and PCS Auxiliary Register
15 14 13 12 11 10
M6–M0
9
8
7
6
5
1
4
1
3
1
2
1
0
1
EX MS
R2 R1–R0
Bit [15]—Reserved → Set to 1.
Bits [14–8]—M [6–0] mcs_n Block Size → These seven bits determine the total memory
block size for the mcs3_n–mcs0_n chip selects. The size is divided equally among them.
The relationship between M [6–0] and the size is shown below.
Select Sizes of M6–M0 by Total Block Size
Total Block
Size
Individual
Select Size
M6–M0
8K
16K
32K
64K
128K
256K
512K
2K
4K
8K
16K
32K
64K
128K
0000001b
0000010b
0000100b
0001000b
0010000b
0100000b
1000000b
Bit [7]—EX Pin Selector → This bit determines whether the pcs6_n–pcs5_n pins are
configured as chip selects or as alternate outputs for a2 and a1. When set to 1,
they are configured as peripheral chip select pins. When 0, they become address bits a1
and a2, respectively.
Bit [6]—MS → Memory/ I/O Space Selector determines whether the pcs_n pins are
active during either memory or I/O bus cycles. When set to 1, the outputs are active for
memory bus cycles. When 0, they are active for I/O bus cycles.
Bits [5–3]—Reserved → Set to 1.
Bit [2]—R2 Ready Mode → This bit influences only the pcs6_n–pcs5_n chip selects.
When set to 1, external ready is ignored. When 0, it is required. Values determine the
number of wait states to be inserted.
Bits [1–0]—R [1–0] Wait-State Value → These bits influence only the pcs6_n–pcs5_n
chip selects. Their value determines the number of wait states inserted into an access,
depending on whether it is to the pcs_n memory or I/O area. Up to three wait states can
be inserted (R1–R0 = 00b to 11b).
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