IA186EM/IA188EM
Data Sheet
8-Bit/16-Bit Microcontrollers
February 25, 2011
Table 41. PIO Pin Assignments (Continued)
PIO Number Associated Pin Name Power-On Reset Status
24
25
mcs2_n
mcs3_n/rfsh_n
uzi
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
c,d
26
27
28
txd
rxd
s6/clkdiv2_n
int4
int2
c,d
29
30
31
a
When used as a PIO pin, it is an input with a pull-up option available.
b
When used as a PIO pin, it is an input with a pull-down option available.
c
Emulators use these pins and also a15–a0, ad15–ad0 (IA186EM), ale, bhe_n (IA186EM), clkouta, nmi, res_n,
and s2_n–s0_n.
d
If bhe_n/aden_n (IA186EM) or rfsh2_n/aden (IA188EM) is held low during POR, these pins revert to normal
operation.
The value of the PDATA registers is undefined at reset (see Tables 42 and 43).
Table 42. PDATA 0
15 14 13 12 11 10
9
8
7
6
5
5
4
4
3
3
2
2
1
1
0
0
PDATA15–PDATA0
Table 43. PDATA 1
15 14 13 12 11 10
9
8
7
6
PDATA31–PDATA16
Bits [15–0]—PDATA15–PDATA0 PIO Data 0 Bits → This register contains the values of
the bits that are either driven on, or received from, the corresponding PIO pins.
Depending on its configuration, each pin is either an output or an input. The values of
these bits correspond to those in the PIO Direction registers and PIO Mode registers.
Bits [15–0]—PDATA31–PDATA16 PIO Data 1 Bits → This register contains the values
of the bits that are either driven on, or received from, the corresponding PIO pins.
Depending on its configuration, each pin is either an output or an input. The values of
these bits correspond to those in the PIO direction registers and PIO Mode registers
The PIO pins may be operated as open-drain outputs by:
– Maintaining the data constant in the appropriate bit of the PIO data register.
– Writing the value of the data bit into the respective bit position of the PIO Direction
register, so that the output is either 0 or disabled depending on the value of the data
bit.
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