XMC4500
XMC4000 Family
Electrical Parameters
3.2.9
Flash Memory Parameters
Note: These parameters are not subject to production test, but verified by design and/or
characterization.
Table 31
Flash Memory Parameters
Parameter
Symbol
Min.
Values
Typ.
5
Unit
Note /
Test Condition
Max.
Erase Time per 256
Kbyte Sector
t
ERP CC
−
−
−
5.5
s
s
s
Erase Time per 64 Kbyte tERP CC
Sector
1.2
0.3
1.4
0.4
Erase Time per 16 Kbyte tERP CC
Logical Sector
Program time per page1)
t
PRP CC
−
−
5.5
11
15
ms
ms
Erase suspend delay
tFL_ErSusp
−
CC
Wait time after margin
change
tFL_Margin 10
Del CC
−
−
μs
Wake-up time
t
WU CC
−
−
−
270
μs
Read access time
ta CC
22
−
ns
For operation
with 1 / fCPU < ta
waitstatesmust
be configured2)
Data Retention Time,
Physical Sector3)4)
t
t
t
RET CC 20
RETL CC 20
RTU CC 20
−
−
−
−
−
−
years Max. 1000
erase/program
cycles
Data Retention Time,
Logical Sector3)4)
years Max. 100
erase/program
cycles
Data Retention Time,
UserConfigurationBlock
(UCB)3)4)
years Max. 4
erase/program
cycles per UCB
1) In case the Program Verify feature detects weak bits, these bits will be programmed once more. The
reprogramming takes an additional time of 5.5 ms.
2) The following formula applies to the wait state configuration: FCON.WSPFLASH × (1 / fCPU) ≥ ta.
3) Storage and inactive time included.
Data Sheet
59
V1.0, 2013-01
Subject to Agreement on the Use of Product Information
INFINEON [ Infineon ]
