XC835/836
General Device Information
2
General Device Information
Chapter 2 contains the block diagram, pin configurations, definitions and functions of the
XC835/836.
2.1
Block Diagram
The block diagram of the XC835/836 is shown in Figure 2.
XC83x
Internal Bus
8-Kbyte
Boot ROM1)
XC800 Core
P0.0 - P0.7
P1.0 - P1.5
256-byte RAM
+
T0 & T1
UART
64-byte monitor
RAM
Vector Computer
CORDIC
MDU
VDDP
VSSP
VSSC
256-byte XRAM
P2.0 – P2.7
P3.0 - P3.2
RTC
IIC
4/8-Kbyte
Flash
WDT
SSC
CCU6
OCDS
SCU
ADC
Clock Generator
Timer 2
48 MHz
On-chip OSC
75 KHz
On-chip OSC
EVR
LED and Touch
Sense Controller
1) Includes 1-Kbyte monitor ROM
Figure 2
XC835/836 Block Diagram
Data Sheet
5
V1.2, 2011-03
INFINEON [ Infineon ]
